CY8C3446AXA-098

Manufacturer Part NumberCY8C3446AXA-098
DescriptionIC MCU 8BIT 64KB FLASH 100TQFP
ManufacturerCypress Semiconductor Corp
SeriesPSOC™ 3 CY8C34xx
CY8C3446AXA-098 datasheets

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Specifications of CY8C3446AXA-098

Core Processor8051Core Size8-Bit
Speed50MHzConnectivityEBI/EMI, I²C, LIN, SPI, UART/USART, USB
PeripheralsCapSense, DMA, POR, PWM, WDTNumber Of I /o62
Program Memory Size64KB (64K x 8)Program Memory TypeFLASH
Eeprom Size2K x 8Ram Size8K x 8
Voltage - Supply (vcc/vdd)1.71 V ~ 5.5 VData ConvertersA/D 2x12b, D/A 1x8b
Oscillator TypeInternalOperating Temperature-40°C ~ 85°C
Package / Case*Lead Free Status / RoHS StatusLead free / RoHS Compliant
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Page 23/126

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5.6 External Memory Interface
CY8C34 provides an External Memory Interface (EMIF) for
connecting to external memory devices. The connection allows
read and write accesses to external memories. The EMIF
operates in conjunction with UDBs, I/O ports, and other
hardware to generate external memory address and control
signals. At 33 MHz, each memory access cycle takes four bus
clock cycles.
Data,
Address,
and Control
Signals
PHUB
Data,
Address,
and Control
Signals
Data,
Address,
and Control
Signals
5.7 Memory Map
The CY8C34 8051 memory map is very similar to the MCS-51
memory map.
5.7.1 Code Space
The CY8C34 8051 code space is 64 KB. Only main flash exists
in this space. See the
“Flash Program Memory”
page 21.
Document Number: 001-53304 Rev. *K
Figure 5-1
is the EMIF block diagram. The EMIF supports
synchronous and asynchronous memories. The CY8C34
supports only one type of external memory device at a time.
External memory can be accessed via the 8051 xdata space; up
to 24 address bits can be used. See
page 25. The memory can be 8 or 16 bits wide.
Figure 5-1. EMIF Block Diagram
Address Signals
IO
PORTs
Data Signals
IO IF
IO
PORTs
Control Signals
IO
PORTs
DSI Dynamic Output
Control
UDB
DSI to Port
Other
EM Control
Control
Signals
Signals
EMIF
5.7.2 Internal Data Space
The CY8C34 8051 internal data space is 384 bytes, compressed
within a 256-byte space. This space consists of 256 bytes of
RAM (in addition to the SRAM mentioned in
21) and a 128-byte space for Special Function Registers (SFRs).
See
Figure
5-2. The lowest 32 bytes are used for 4 banks of
registers R0-R7. The next 16 bytes are bit-addressable.
section on
®
PSoC
3: CY8C34 Family
Data Sheet
“xdata Space”
section on
External _ MEM_ ADDR[23:0]
External _ MEM_ DATA[15:0]
Control
Static RAM
on page
Page 23 of 126
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