AD6623S/PCB Analog Devices Inc, AD6623S/PCB Datasheet - Page 37

• Manufacturer Part Number: AD6623S/PCB
• Description: BOARD EVAL SGNL PROCESSOR AD6623
• Manufacturer: Analog Devices Inc

Specifications of AD6623S/PCB

• Rohs Status: RoHS non-compliant
• Module/board Type: Evaluation Board
• For Use With/related Products: AD6623
• Lead Free Status / Rohs Status: Not Compliant

Channel Function Registers (continued)
Internal Address
0x105
0x106
0x107
0x108
0x109
0x10A
0x10B
0x10C
0x10D
0x10E
0x10F
REV. A
Bit
17–16
15–0
7–5
4–0
8–0
11–8
7–0
7–0
15–8
7
6–0
7
6–0
15–10
9
8
7
6
5
4
3–0
7–6
5
4–0
15
14–2
1–0
17–16
15–0
AD6622 Compatible Description
Reserved
Ch. A NCO Phase Offset Update Hold–off Counter
Reserved
Ch. A CIC Scale, S
Reserved
Reserved
Ch. A C1C2 Interpolation, L
Ch. A C1C5 Interpolation, L
Reserved
Reserved
Ch. A RCF TapsA, N
Reserved
Ch. A RCF Coefficient Offset, O
Unused
Unused
Unused
Ch. A PRBS Length
Ch. A RCF PRBS Enable
Ch. A RCF Mode Select (1 of 2)
Ch. A RCF Mode Select (2 of 2)
Ch. A RCF (Taps per Phase) –1
Ch. A RCF Coarse Scale (a)
Ch. A RCF Phase EQ Enable
Ch. A Serial Clock Divisor (2, 4, …64)
Ch. A Serial Fine Scale Factor Enable
Ch. A RCF Unsigned Scale Factor
Reserved
Unused
Ch. A RCF Scale Hold–Off Counter
0: 15
1: 8,388,607
00: FIR
01: FIR
10: QPSK
11: MSK
00: 0 dB
01: –6 dB
10: –12 dB
11: –18 dB
CIC
2
RCF
– 1 (7 bits)
2
5
–37–
–1
–1
2
2
2
RCF
3
2
2
(7 bits)
2
2
AD6623 Extensions Description
Ch. A Phase Sync Select
No Change
No Change
No Change
Ch. A CIC2 Decimation, M
Ch. A CCI2 Interpolation, L
No Change
No Change
Ch. A RCF TapsB, N
Ch. A RCF TapsA, N
No Change
Ch. A RCF Coef Offset, O
No Change
Reserved
Ch. A Compact FIR Input Word Length
Ch. A RCF PRBS Enable
Ch. A RCF PRBS Length
Ch. A RCF Mode Select (1 of 3)
Ch. A RCF Mode Select (2 of 3)
Ch. A RCF Mode Select (3 of 3)
No Change
No Change
No Change
Ch. A Serial Clock Divisor (1, 2,…32)
Ch. A Unsigned Scale Factor
No Change
Reserved
Ch. A Time Slot Sync Select
The counter is unchanged, but instead of
just scale update, when the counter hits one,
the following sequence is initiated:
00: Sync0 (See 0x001 Beam)
01: Sync1
10: Sync2
11: Sync3
0: 16 bits—8 I followed by 8 Q
1: 24 bits—12 I followed by 12 Q
0: 15
1: 8,388,607
000: FIR
001: /4–DQPSK
010: GMSK
011: MSK
100: FIR, Compact Input Resolution
101: 8–PSK
110: 3π/8–8PSK
111: QPSK
This is extended to allow values in the
range (0–2).
00: Sync0 (See 0x001 Beam)
01: Sync1
10: Sync2
11: Sync3
1. Ramp Down (if Ramp is enabled)
2. Update RCF Mode Select registers
3. Ramp Up (if Ramp is enabled)
marked with
3
3
3
3
3
“2”
RCF
.
RCF
2
RCF
– 1 (new MSB)
– 1 (8 bits)
2
AD6623
2
2
–1, extended
(new MSB)
3
–1
3
3
3
2
3
3