MGA-71543-BLKG Avago Technologies US Inc., MGA-71543-BLKG Datasheet - Page 2

IC AMP MMIC LNA GAAS 3V SOT-343

MGA-71543-BLKG

Manufacturer Part Number
MGA-71543-BLKG
Description
IC AMP MMIC LNA GAAS 3V SOT-343
Manufacturer
Avago Technologies US Inc.
Type
General Purpose Amplifierr
Datasheet

Specifications of MGA-71543-BLKG

P1db
13.1dBm
Noise Figure
1.1dB ~ 1.45dB
Package / Case
SC-70-4, SC-82-4, SOT-323-4, SOT-343
Current - Supply
50mA ~ 60mA
Frequency
100MHz ~ 6GHz
Gain
14.4dB ~ 17.4dB
Rf Type
CDMA, TDMA, W-CDMA
Test Frequency
2.01GHz
Voltage - Supply
2.7V ~ 4.2V
Mounting Style
SMD/SMT
Technology
Low Noise Amplifier
Number Of Channels
1
Operating Frequency
6000 MHz
Operating Supply Voltage
3 V
Supply Current
50 mA
Maximum Power Dissipation
200 mW
Maximum Operating Temperature
+ 150 C
Manufacturer's Type
Low Noise Amplifier
Frequency (max)
6GHz
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (typ)
3V
Operating Supply Voltage (max)
4.2V
Package Type
SOT-343
Mounting
Surface Mount
Pin Count
3 +Tab
Noise Figure (typ)
1.1@6000MHzdB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
516-1952
MGA-71543-BLKG

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MGA-71543-BLKG
Manufacturer:
NXP
Quantity:
12 000
Part Number:
MGA-71543-BLKG
Manufacturer:
AVAGO/安华高
Quantity:
20 000
2
Functional Block Diagram
MGA-71543 Absolute Maximum Ratings
P
T
Product Consistency Distribution Charts
Notes:
5. Distribution data sample size is 450 samples
6. Measurements made on production test
Symbol
V
V
I
P
T
d
j
in
d
c
d
STG
RF IN
taken from 9 different wafers. Future wafers
allocated to this product may have nominal
values anywhere within the upper and lower
specification limits.
board, Figure 4. This circuit represents a
trade-off between an optimal noise match
and a realizable match based on production
test requirements at 10 mA bias current.
150
120
Figure 1. Gain @ 2 GHz, 3V, 10 mA.
LSL = 14.4, Nominal = 15.9, USL = 17.4
90
60
30
0
14.4
Switch & Bias
Parameter
Maximum Input to Output Voltage
Maximum Input to Ground DC Voltage
Supply Current
Power Dissipation
CW RF Input Power
Junction Temperature
Storage Temperature
-3 Std
15.4
GAIN (dB)
16.4
[2]
+3 Std
RF OUT
Cpk = 2.00
Std = 0.24
17.4
[4]
RF Gnd
& V
Input
[1]
[4]
[5,6]
Simplified Schematic
ref
Excess circuit losses have been de-embedded
from actual measurements. Performance may
be optimized for different bias conditions and
applications. Consult Application Note for
details.
150
120
Figure 2. IIP3 @ 2 GHz, 3V, 10 mA.
LSL = 1.0, Nominal = 3.0, USL = 8.0
90
60
30
0
1
Units
V
V
mA
mW
dBm
°C
°C
-3 Std
2
Absolute
Maximum
5.5
+.3
-5.5
60
240
+15
170
-65 to +150
3
+
Gain FET
IIP3 (dBm)
4
Control
+
5
6
+3 Std
Operation
Maximum
4.2
+.1
-4.2
50
200
+10
150
-40 to +85
Cpk = 1.16
Std = 0.96
7
Output
& V
RF Gnd
& Vs
d
8
Input
Evaluation Test Circuit
(single positive bias)
Thermal Resistance:
θ
Notes:
1. Operation of this device in excess of any of
2. Ground lead temperature at 25°C.
3. Thermal resistance measured by 150°C Liquid
4. Maximum rating assumes other parameters
jc
control
these limits may cause permanent damage.
Crystal Measurement method.
are at DC quiescent conditions.
= 240°C/W
150
120
Figure 3. NF @ 2 GHz, 3V, 10 mA.
LSL = 0.85, Nominal = 1.08, USL = 1.45
2.7 nH
90
60
30
R
0
1.5 nH
0.85
bias
0.95
-3 Std
1.05
NF (dB)
+3 Std
1.15
[2, 3]
1.25
V
d
Cpk = 2.33
Std = 0.02
1.35
Output
1.45

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