ATAB5423-3-WB Atmel, ATAB5423-3-WB Datasheet

ATAB5423-3-WB

Manufacturer Part Number

ATAB5423-3-WB

Description

KIT DEMO 315MHZ BLACKBIRD

Manufacturer

Atmel

Type

Transceiver, UHFr

Datasheets

1.ATAB5428-8-WB.pdf (100 pages)

2.ATAB5428-8-WB.pdf (24 pages)

Specifications of ATAB5423-3-WB

Frequency

315MHz

Product

RF Modules

For Use With/related Products

ATA5423

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Other names

ATAB-5423-3-WB

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Download datasheet (2Mb)

Features

•

Multi Channel Half-duplex Transceiver with Approximately ±2.5 MHz Programmable

Tuning Range

High FSK Sensitivity: –106 dBm at 20 Kbit/s/–109.5 dBm at 2.4 Kbit/s (433.92 MHz)

High ASK Sensitivity: –112.5 dBm at 10 Kbit/s/–116.5 dBm at 2.4 Kbit/s (433.92 MHz)

Low Supply Current: 10.5 mA in RX and TX Mode (3V/TX with 5 dBm)

Data Rate: 1 to 20 Kbit/s Manchester FSK, 1 to 10 Kbit/s Manchester ASK

ASK/FSK Receiver Uses a Low-IF Architecture with High Selectivity, Blocking, and Low

Intermodulation (Typical Blocking 55 dB at ±750 kHz/61 dB at ±1.5 MHz and

70 dB at ±10 MHz, System I1dBCP = –30 dBm/System IIP3 = –20 dBm)

226 kHz/237 kHz IF Frequency with 30 dB Image Rejection and 170 kHz Usable IF

Bandwidth

Transmitter Uses Closed Loop Fractional-N Synthesizer for FSK Modulation with a

High PLL Bandwidth and an Excellent Isolation between PLL/VCO and PA

Tolerances of XTAL Compensated by Fractional-N Synthesizer with 800 Hz RF

Resolution

Integrated RX/TX-Switch, Single-ended RF Input and Output

RSSI (Received Signal Strength Indicator)

Communication to Microcontroller with SPI Interface Working at Maximum 500 kBit/s

Configurable Self Polling and RX/TX Protocol Handling with FIFO-RAM Buffering of

Received and Transmitted Data

5 Push Button Inputs and One Wake-up Input are Active in Power-down Mode

Integrated XTAL Capacitors

PA Efficiency: up to 38% (433.92 MHz/10 dBm/3V)

Low In-band Sensitivity Change of Typically ±1.8 dB within ±58 kHz Center Frequency

Change in the Complete Temperature and Supply Voltage Range

Supply Voltage Switch, Supply Voltage Regulator, Reset Generation, Clock/Interrupt

Generation and Low Battery Indicator for Microcontroller

Fully Integrated PLL with Low Phase Noise VCO, PLL Loop Filter and Full Support of

Multi-channel Operation with Arbitrary Channel Distance Due to Fractional-N

Synthesizer

Sophisticated Threshold Control and Quasi-peak Detector Circuit in the Data Slicer

Power Management via Different Operation Modes

315 MHz, 345 MHz, 433.92 MHz, 868.3 MHz and 915 MHz without External VCO and PLL

Components

Inductive Supply with Voltage Regulator if Battery is Empty (AUX Mode)

Efficient XTO Start-up Circuit (> –1.5 k Worst Case Real Start-up Impedance)

Changing of Modulation Type ASK/FSK and Data Rate without Component Changes

Minimal External Circuitry Requirements for Complete System Solution

Adjustable Output Power: 0 to 10 dBm Adjusted and Stabilized with External Resistor

ESD Protection at all Pins (1.5 kV HBM, 200V MM, 1 kV FCDM)

Supply Voltage Range: 2.4V to 3.6V or 4.4V to 6.6V

Temperature Range: –40°C to +85°C

Small 7

7 mm QFN48 Package

UHF ASK/FSK

Transceiver

ATA5423

ATA5425

ATA5428

ATA5429

4841D–WIRE–10/07

Related parts for ATAB5423-3-WB

ATAB5423-3-WB Summary of contents

Page 1

Features • Multi Channel Half-duplex Transceiver with Approximately ±2.5 MHz Programmable Tuning Range • High FSK Sensitivity: –106 dBm at 20 Kbit/s/–109.5 dBm at 2.4 Kbit/s (433.92 MHz) • High ASK Sensitivity: –112.5 dBm at 10 Kbit/s/–116.5 dBm at 2.4 ...

Page 2

Applications • Consumer Industrial Segment • Access Control Systems • Remote Control Systems • Alarm and Telemetry Systems • Energy Metering • Home Automation Benefits • Low System Cost Due to Very High System Integration Level • Only One Crystal ...

Page 3

General Description The ATA5423/25/28/ highly integrated UHF ASK/FSK multi-channel half-duplex trans- ceiver with low power consumption supplied in a small QFN48 package. The receive part is built as a fully integrated low-IF receiver, ...

Page 4

Figure 1-1. System Block Diagram Antenna Matching/ RF Switch Figure 1-2. Pinning QFN48 ATA5423/ATA5425/ATA5428/ATA5429 4 ATA5423/ATA5425/ATA5428/ATA5429 RF Transceiver Digital Control Logic XTO RF_IN 4 NC ...

Page 5

Table 1-1. Pin ...

Page 6

Table 1-1. Pin Figure 1-3. Block Diagram 433_N868 RF transceiver R_PWR RF_OUT PA PWR_H RX/TX RX_TX1 switch RX_TX2 RF_IN LNA CDEM RSSI XTAL1 XTAL2 DEM_OUT CLK N_RESET IRQ Microcontroller interface CS SCK SDI_TMDI ...

Page 7

Application Circuits 2.1 Typical Remote Control Unit Application with 1 Li Battery (3V) Figure 2-1 external components are 11 capacitors, 1 resistor, 2 inductors and a crystal. C voltage supply blocking capacitors. C capacitor used for the internal quasi-peak ...

Page 8

Typical Base-station Application (5V) Figure 2.2 external components are 12 capacitors, 1 resistor, 4 inductors, a SAW filter, and a crystal. C and C 3 ing capacitors for the internal voltage regulators fixed capacitor used for ...

Page 9

Typical Remote Control Unit Application Batteries (6V) Figure 2-3 nal components are 11 capacitors, 1 resistor, 2 inductors and a crystal. C voltage supply blocking capacitors. C nal voltage regulators. C used for the internal quasi-peak detector ...

Page 10

RF Transceiver As seen in PA (Power Amplifier), RX/TX switch, fractional-N frequency synthesizer and the signal process- ing part with mixer, IF filter, IF amplifier with analog RSSI, FSK/ASK demodulator, data filter, and data slicer. In receive mode the ...

Page 11

A low-IF architecture is also less sensitive to second-order intermodulation (IIP2) than direct conversion receivers, where every pulse or AM-modulated signal (especially the signals from TDMA systems like GSM) demodulates to the receiving signal band at second-order non-linearities. Note: 3.2 ...

Page 12

Table 3-2. Table 3-3. RF Frequency 315 MHz 345 MHz 433.92 MHz 868.3 MHz 915 MHz Table 3-4. RF Frequency 315 MHz 345 MHz 433.92 MHz 868.3 MHz 915 MHz 3.3 Sensitivity versus Supply Voltage, Temperature and Frequency Offset To ...

Page 13

Figure 3-2. As can be seen in perature has an influence of about +1.5/–0.7 dB, and a frequency offset of ±65 kHz also influences by about ±1 dB. All these influences, combined with the sensitivity of a typical IC, are ...

Page 14

Frequency Accuracy of the Crystals The XTO is an amplitude regulated Pierce oscillator with integrated load capacitors. The initial tolerances (due to the frequency tolerance of the XTAL, the integrated capacitors on XTAL1, XTAL2 and the XTO’s initial transconductance ...

Page 15

Figure 3-3. Figure 3-4. Figure 3-5 on page 16 trate the selectivity and image rejection. This measurement was done 6 dB above the sensitivity level with a useful signal of 433.92 MHz/FSK/20 Kbit/s/±16 kHz/ Manchester with a level of –106 ...

Page 16

Table 3-6. The ATA5423/ATA5425/ATA5428/ATA5429 can also receive FSK and ASK modulated signals if they are much higher than the I1dBCP. It can typically receive useful signals at 10 dBm. This is often referred to as the nonlinear dynamic range which ...

Page 17

In-band Disturbers, Data Filter, Quasi-peak Detector, Data Slicer If a disturbing signal falls into the received band or a blocker is not continuous wave, the perfor- mance of a receiver strongly depends on the circuits after the IF filter. ...

Page 18

Frequency Synthesizer The synthesizer is a fully integrated fractional-N design with internal loop filters for receive and transmit mode. The XTO frequency f The bits FR0 to FR12 in control registers 2 and 3 (see page 40) are used ...

Page 19

Figure 3-7. FSK-modulated TX Spectrum (433.92MHz/20 Kbit/s/±16.17 kHz/Manchester Code) Ref 10 dB Samp Log 10 dB/ VAvg Center 433.92 MHz Res BW 100 kHz Figure 3-8. Unmodulated TX Spectrum 433.92 MHz – 16.17 kHz (f ...

Page 20

Figure 3-9. FSK-modulated TX Spectrum (433.92 MHz/20 Kbit/s/±16.17 kHz/Manchester Code) Ref 10 dB Samp Log 10 dB/ VAvg Center 433.92 MHz Res BW 10 kHz 3.12 Output Power Setting and PA Matching at RF_OUT The ...

Page 21

Example: According to 11 dBm the overall current consumption is typically 17.8 mA; hence, the PA needs 17 6. 10. this mode, which corresponds to an overall power amplifier efficiency of the PA of ...

Page 22

Table 3-7. Measured Output Power and Current Consumption with VS1 = VS2 = 3V, T Frequency (MHz) TX Current (mA) Output Power (dBm 315 8.5 315 10.5 315 16.7 345 8.8 345 10.4 345 16.9 433.92 8.6 ...

Page 23

Table 3-9 3.0V/25°C. As can be seen, a temperature change to –40°C as well as to +85°C reduces the power by less than 1 dB due to the band gap regulated output current. Measurements of all the cases in relative ...

Page 24

Matching Network in TX Mode In TX mode the 20 mm long and 0.4 mm wide transmission line which is much shorter than /4 is approximately switched in parallel to the capacitor C C and C 8 antenna with ...

Page 25

XTO The XTO is an amplitude-regulated Pierce oscillator type with integrated load capacitances ( with a tolerance of ±17%) hence C lation frequency f designing the system in terms of receiving and transmitting frequency offset, the accuracy ...

Page 26

C of the XTAL has to be lower than C 0 enter the steep region of pulling versus load capacitance where there is a risk of an unstable oscillation. To ensure proper start-up behavior the small signal gain, and thus ...

Page 27

Figure 4- IDLE mode and during Sleep mode (RX_Polling) To find the right values used in control registers 2 and 3 (see relationship between f content, the frequency at pin CLK as well as the output ...

Page 28

Table 4-1. Calculation CREG1 Frequency Pin 6 Bit(4) (MHz) 433_N868 FS 315 AVCC 1 345 AVCC 0 433.92 AVCC 0 868.3 GND 0 915 GND 0 The variable FREQ depends on FREQ2 and FREQ3, which are defined ...

Page 29

Pin CLK Pin CLK is an output to clock a connected microcontroller. The clock frequency f as follows CLK Because the enabling of pin CLK is asynchronous, the first clock cycle may be incomplete. The signal at ...

Page 30

Power Supply Figure 5-1. Power Supply VS1 VS2 VSINT (Control register 1) AVCC_EN 1 PWR_ON DVCC_OK 1 OFFCMD S 0 (Command via SPI VS1+ - P_On_Aux 0.55V + (Status register) typ. IN V_REG2 ...

Page 31

AVCC is the internal operation voltage of the RF transceiver and is fed by VS1 via the switch SW_AVCC. AVCC must be blocked with capacitor (see on page 8 DVCC is the internal operation voltage of the ...

Page 32

Figure 5-2. Operation Modes Flow Chart Bit AVCC_EN = 0 and OFF Command and Pin PWR_ON = 0 and Pin T1, T2, T3, T4 and Pin PWR_ON = 1 or Pin T1, T2, T3 IDLE ...

Page 33

AUX Mode The transceiver changes from OFF mode to AUX mode if the voltage at pin VAUX V (typically). In AUX mode DVCC and VSOUT are connected to the auxiliary power supply input (VAUX) via the voltage regulator V_REG2. ...

Page 34

The status bit Low_Batt is set to “1” if the voltage at pin VSOUT V (typically 2.38V). Low_Batt is set to “0” via the 4-wire serial interface or N_RESET is set to low VSOUT trol register ...

Page 35

Figure 5-4. 5 Battery Application (3V) The supply voltage range is 2.4V to 3.6V and VAUX is not used. Figure 5-5. 4841D–WIRE–10/07 ATA5423/ATA5425/ATA5428/ATA5429 Reset Logic, SR Latch Generates the Hysteresis in the NRESET Signal DVCC_OK and XTO_OK VSOUT_EN ...

Page 36

Li Battery Application (6V) The supply voltage range is 4.4V to 6.6V and VAUX is connected to an inductive supply. Figure 5-6. 6. Microcontroller Interface The microcontroller interface is a level converter which converts all internal digital signals ...

Page 37

After the transceiver is turned on via pin PWR_ON = High Low Low Low Low Low or the voltage at pin VAUX V are in the default state. Figure ...

Page 38

Control Register To use the transceiver in different applications, it can be configured by a connected microcon- troller via the 4-wire serial interface. 7.3.1 Control Register 1 (ADR 0) Table 7-1. IR1 Table 7-2. IR1 ...

Page 39

Table 7-6. T_MODE 7.3.2 Control Register 2 (ADR 1) Table 7-7. FR6 Note: Table 7-8. P_MODE Table 7-9. P_MODE 4841D–WIRE–10/07 ATA5423/ATA5425/ATA5428/ATA5429 Control Register 1 (Function of Bit 0) Function 0 TX and ...

Page 40

Control Register 3 (ADR 2) Table 7-10. FR12 Note: Table 7-11. VSOUT_EN Note: Table 7-12. CLK_ON Note: 7.3.4 Control Register 4 (ADR 3) Table 7-13. ASK_NFSK ATA5423/ATA5425/ATA5428/ATA5429 40 Control ...

Page 41

Table 7-14. Sleep4 Table 7-15. XSleep Table 7-16. XLim 7.3.5 Control Register 5 (ADR 4) Table 7-17. BitChk1 4841D–WIRE–10/07 ATA5423/ATA5425/ATA5428/ATA5429 Control Register 4 (Function of Bit 6, Bit ...

Page 42

Table 7-18. Control Register 5 (Function of Bit 5, Bit 4, Bit 3, Bit 2, Bit 1 and Bit Mode) Lim_min5 Lim_min4 Lim_min3 ...

Page 43

Table 7-21. Control Register 6 (Function of Bit 5, Bit 4, Bit 3, Bit 2, Bit 1 and Bit 0) Lim_max5 Lim_max4 Lim_max3 ...

Page 44

Table 7-22. Status Bit Power_On Low_Batt P_On_Aux 7.5 Pin Tn To switch the transceiver from OFF to IDLE mode, pin Tn must be set to “0” (maximum 0.2 V sets pin N_RESET to low and switches on DVCC, AVCC and ...

Page 45

If the transceiver is in any active mode (IDLE, AUX, TX, RX, RX_Polling), an integrated debounce logic is active. If there is an event on pin Tn a debounce counter is set and started. The ...

Page 46

Pin PWR_ON To switch the transceiver from OFF to IDLE mode, pin PWR_ON must be set to “1” (minimum 0.8 V sets pin N_RESET to low, and switches on DVCC, AVCC and the power supply for external devices VSOUT. ...

Page 47

Low Battery Indicator The status bit Low_Batt is set to “1” if the voltage V (typically). Low_Batt is set to “0” serial interface (see Figure 7-5. 7.8 Pin VAUX To switch the transceiver from OFF to AUX ...

Page 48

Figure 7-6. Timing Pin VAUX, Status Bit P_On_Aux 3.5V (typ) VAUX 2.0V (typ) V Thres_2 V VSOUT Thres_1 DVCC N_RESET CLK P_ON_AUX (Status register) IRQ OFF Mode ATA5423/ATA5425/ATA5428/ATA5429 48 V VAUX = 2.38V (typ) = 2.3V (typ) AUX Mode > ...

Page 49

Transceiver Configuration The configuration of the transceiver takes place via a 4-wire serial interface (CS, SCK, SDI_TMDI, SDO_TMDO) and is organized in 8-bit units. The configuration is initiated with an 8-bit command. While shifting the command into pin SDI_TMDI, ...

Page 50

Command: Write Control Register The control registers can be written individually or successively. An echo of the command and the data bytes are provided for the microcontroller on pin SDO_TMDO. Figure 8-4. Write Control Register MSB SDI_TMDI Command: Write ...

Page 51

Table 8-1. Command Read TX/RX data buffer Write TX/RX data buffer Read control/status register Write control register OFF command Delete IRQ Not used Not used 8.8 4-wire Serial Interface The 4-wire serial interface consists of the Chip Select (CS), the ...

Page 52

Operation Modes 9.1 RX Operation The transceiver is set to RX operation with the bits OPM0 and OPM1 in control register 1. Table 9-1. The transceiver is designed to consume less than operation while remaining ...

Page 53

To save current it is recommended that CLK and V does not include the current of the Microcontroller_Interface, I device connected to pin VSOUT (for example, microcontroller). If CLK and/or VSOUT is enabled during RX polling mode the current consumption ...

Page 54

Figure 9-1. Flow Chart Polling Mode/RX Mode (T_MODE = 0, Transparent Mode Inactive) Start RX Polling Mode Sleep mode: All circuits for analog signal processing are disabled. Only XTO and Polling logic is enabled. Output level on pin RX_ACTIVE Low; ...

Page 55

Figure 9-2. Flow Chart Polling Mode/RX Mode (T_MODE = 1, Transparent Mode Active) Start RX Polling Mode Sleep mode: All circuits for analog signal processing are disabled. Only XTO and Polling logic is enabled. Output level on pin RX_ACTIVE Low; ...

Page 56

Bit-check Mode In bit-check mode the incoming data stream is examined to distinguish between a valid signal from a corresponding transmitter and signals due to noise. This is done by subsequent time frame checks where the distance between 2 ...

Page 57

For the best noise immunity, use of a low span between T This is achieved using a fixed frequency at a 50% duty cycle for the transmitter preburst: a “11111...” “10101...” sequence in Manchester or Bi-phase is a ...

Page 58

Figure 9-6. Timing Diagram for Failed Bit Check (Condition CV_Lim < Lim_min) (Lim_min = 14, Lim_max = 24) RX_ACTIVE Bit check Demod_Out Bit-check counter 0 T Startup_Sig_Proc Start-up mode Figure 9-7. Timing Diagram for Failed Bit Check (Condition: CV_Lim (Lim_min ...

Page 59

In the presence of a valid transmitter signal, T nal, f Signal longer period for T 9.1.7 Receiving Mode If the bit check was successful for all bits specified by N receiving mode. To activate a connected microcontroller, the bits ...

Page 60

If the TX/RX data buffer control logic detects the start bit, the data stream is written in the TX/RX data buffer byte by byte. The start bit is part of the first data byte and must be different from the ...

Page 61

Figure 9-10. Bit Error (TMODE = 0) Demod_Out Receiving mode Table 9-2. Mode RX 9.1.8 Recommended Lim_min and Lim_max for Maximum Sensitivity The sensitivity measurements in the section “Low-IF Receiver” in Table 3-4 on page 12 9-3. These values are ...

Page 62

TX Operation The transceiver is set to TX operation by using the bits OPM0 and OPM1 in the control register 1. Table 9-4. Before activating TX mode, the TX parameters (bit rate, modulation scheme, etc.) must be selected as ...

Page 63

Figure 9-11. TX Operation (T_MODE = 0) Command: Delete_IRQ N Pin IRQ = Write Control Register 1 OPM1, OPM0: Set IDLE 4841D–WIRE–10/07 ATA5423/ATA5425/ATA5428/ATA5429 Write Control Register 6 Baud1, BAUD0: Select baud rate range Lim_max0 to Lim_max5: Don't ...

Page 64

Figure 9-12. TX Transparent Mode (T_MODE = 1) ATA5423/ATA5425/ATA5428/ATA5429 64 Write Control Register 4 XLim: Don't care ASK/_NFSK: Select modulation Sleep0 to Sleep4: Don't care XSleep: Don't care Write Control Register 3 FR7, FR8: Adjust f RF VSOUT_EN: Set VSOUT_EN ...

Page 65

Table 9-5. TX Modulation Schemes Mode ASK/_NFSK 9.3 Interrupts Via pin IRQ, the transceiver signals different operating conditions to a connected microcontrol- ler specific operating condition occurs, pin IRQ is set to high ...

Page 66

Absolute Maximum Ratings Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated ...

Page 67

... Electrical Characteristics: General This device is manufactured with an industrial (not automotive) grade process and process controls. Although this device may meet certain automotive grade criteria in performance, Atmel can not recommend that this device be used in any automotive application. All parameters refer to GND and are valid for T ...

Page 68

... Electrical Characteristics: General (Continued) This device is manufactured with an industrial (not automotive) grade process and process controls. Although this device may meet certain automotive grade criteria in performance, Atmel can not recommend that this device be used in any automotive application. All parameters refer to GND and are valid for T ...

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Electrical Characteristics Battery Application (3V) All parameters refer to GND and are valid for 315 MHz/345 MHz/433.92 MHz/868.3 MHz/915 MHz unless otherwise specified RF No. Parameters Test Conditions Battery Application (3V) ...

Page 86

Electrical Characteristics Battery Application (3V) (Continued) All parameters refer to GND and are valid for 315 MHz/345 MHz/433.92 MHz/868.3 MHz/915 MHz unless otherwise specified RF No. Parameters Test Conditions V VS1 I VSOUT CLK ...

Page 87

Electrical Characteristics Battery Application (6V) All parameters refer to GND and are valid for 315 MHz/345 MHz/433.92 MHz/868.3 MHz/915 MHz unless otherwise specified RF No. Parameters Test Conditions Battery Application (6V) ...

Page 88

Electrical Characteristics Battery Application (6V) (Continued) All parameters refer to GND and are valid for 315 MHz/345 MHz/433.92 MHz/868.3 MHz/915 MHz unless otherwise specified RF No. Parameters Test Conditions Current during 10.12 I VSOUT ...

Page 89

Electrical Characteristics: Base-station Application (5V) All parameters refer to GND and are valid for 315 MHz/345 MHz/433.92 MHz/868.3 MHz/915 MHz unless otherwise specified. RF No. Parameters Test Conditions 11 Base-station Application (5V) Supported voltage Base 11.1 ...

Page 90

Electrical Characteristics: Base-station Application (5V) (Continued) All parameters refer to GND and are valid for 315 MHz/345 MHz/433.92 MHz/868.3 MHz/915 MHz unless otherwise specified. RF No. Parameters Test Conditions Current in RX_Polling_Mode on pin VS2 and ...

Page 91

Digital Timing Characteristics All parameters refer to GND and are valid for T application (6V)) and V = 5.0V (Base VS2 No. Parameters Test Conditions 12 Basic Clock Cycle of the Digital Circuitry 12.1 Basic clock cycle XLIM = ...

Page 92

Digital Timing Characteristics (Continued) All parameters refer to GND and are valid for T application (6V)) and V = 5.0V (Base VS2 No. Parameters Test Conditions XLIM = 0 BR_Range_0 BR_Range_1 BR_Range_2 Minimum time period BR_Range_3 between edges at ...

Page 93

Digital Timing Characteristics (Continued) All parameters refer to GND and are valid for T application (6V)) and V = 5.0V (Base VS2 No. Parameters Test Conditions Start Time Push Button Tn and PWR_ON 16 - Timing of Wake up ...

Page 94

Digital Timing Characteristics (Continued) All parameters refer to GND and are valid for T application (6V)) and V = 5.0V (Base VS2 No. Parameters Test Conditions PWR_ON high to positive edge on pin Every mode except OFF 16.2 IRQ ...

Page 95

Digital Port Characteristics All parameters refer to GND and are valid for 4. attery application (6V)) and V VS2 and T = 25°C unless otherwise ...

Page 96

Digital Port Characteristics (Continued) All parameters refer to GND and are valid for 4. attery application (6V)) and V VS2 and T = 25°C unless ...

Page 97

Ordering Information Extended Type Number - ATA5423 PLQW - ATA5425 PLQW - ATA5428 PLQW - ATA5429 PLQW - ATA5423 PLSW - ATA5425 PLSW - ATA5428 PLSW - ATA5429 PLSW Note RoHS compliant 19. Package Information Package: QFN ...

Page 98

Revision History Please note that the following page numbers referred to in this section refer to the specific revision mentioned, not to this document. Revision No. 4841D-WIRE-10/07 4841C-WIRE-05/06 ATA5423/ATA5425/ATA5428/ATA5429 98 History Put datasheet in a new template Put datasheet ...

Page 99

Table of Contents Features ..................................................................................................... 1 Applications .............................................................................................. 2 Benefits...................................................................................................... 2 1 General Description ................................................................................. 3 2 Application Circuits ................................................................................. Transceiver ....................................................................................... 10 4 XTO .......................................................................................................... 25 5 Power Supply ......................................................................................... 30 6 Microcontroller Interface ....................................................................... ...

Page 100

... Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN ATMEL’S TERMS AND CONDI- TIONS OF SALE LOCATED ON ATMEL’S WEB SITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT ...

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