ATA5743P3-TGQY Atmel, ATA5743P3-TGQY Datasheet - Page 13

• Manufacturer Part Number: ATA5743P3-TGQY
• Description: IC RCVR ASK/FSK 300KHZ 20SOIC
• Manufacturer: Atmel

Specifications of ATA5743P3-TGQY

• Frequency: 300MHz ~ 450MHz
• Sensitivity: -110dBm
• Data Rate - Maximum: 10 kBaud
• Modulation Or Protocol: ASK, FSK
• Applications: RKE, Telemetering, Security Technology
• Current - Receiving: 7.5mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 20-SOIC (0.300", 7.50mm Width)
• Operating Frequency (max): 450000kHz
• Operating Temperature (min): -40C
• Operating Temperature (max): 105C
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Memory Size: -
• Lead Free Status / Rohs Status: Compliant

Figure 6-2.
4839B–RKE–08/05
NO
Polling Mode Flow Chart
Sleep Mode:
All circuits for signal processing are
disabled. Only XTO and polling logic are
enabled.
Output level on pin IC_ACTIVE => low
I
T
Start-up Mode:
The signal processing circuits are
enabled. After the start-up time (T
circuits are in a stable condition and ready
to receive.
Output level on pin IC_ACTIVE => high
I
T
Bit-check Mode:
The incoming data stream is analyzed. If
the timing indicates a valid transmitter
signal, the receiver is set to receive mode.
Otherwise it is set to Sleep mode.
Output level on pin IC_ACTIVE => high
I
T
Receiving Mode:
The receiver is turned on permanently
and passes the data stream to the
connected microcontroller. It can be set to
Sleep mode through an OFF command
via pin DATA or POLLING/_ON.
Output level on pin IC_ACTIVE => high
I
S
S
S
S
Sleep
Startup
Bit-check
= I
= I
= I
= I
Soff
Son
Son
Son
= Sleep
OFF command
Bit-check
X
OK?
Sleep
YES
1024
T
Clk
Startup
) all
Sleep:
X
T
T
T
Sleep
Clk
Startup
Bit-check
:
:
:
:
5-bit word defined by Sleep0 to Sleep4 in
OPMODE register
Extension factor defined by X
according to Table 9
Basic clock cycle defined by f
MODE
Defined by the selected baud rate range
and T
by Baud0 and Baud1 in the OPMODE
register
Depends on the result of the bit check
If the bit check is ok, T
on the number of bits to be checked
(N
If the bit check fails, the average time
period for that check depends on the
selected baud-rate range on T
baud-rate range is defined by Baud0 and
Baud1 in the OPMODE register
Bit-check
Clk
. The baud-rate range is defined
), and on the utilized data rate
Bit-check
depends
SleepStd
XTO
Clk
. The
and pin
ATA5743
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