ATA5743P6-TGSY Atmel, ATA5743P6-TGSY Datasheet
ATA5743P6-TGSY
Specifications of ATA5743P6-TGSY
Related parts for ATA5743P6-TGSY
ATA5743P6-TGSY Summary of contents
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... RF low-cost data transmission sys- tems with data rates from 1 kBaud to 10 kBaud in Manchester or Bi-phase code. The receiver is well suited to operate with Atmel's PLL RF transmitter U2741B. Its main applications are in the areas of telemetering, security technology, and keyless-entry systems ...
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System Block Diagram Figure 2-1. System Block Diagram UHF ASK/FSK Remote Control Transmitter ATA575x XTO PLL VCO Power amp. 3. Pin Configuration Figure 3-1. Pinning SSO20 ATA5743 2 UHF ASK/FSK Remote Control Receiver ATA5743 Demod Antenna Antenna LNA VCO ...
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Table 3-1. Pin Description Pin Symbol 1 SENS 2 IC_ACTIVE 3 CDEM 4 AVCC 5 TEST 6 AGND 7 MIXVCC 8 LNAGND 9 LNA_IN LFVCC LFGND 14 XTO 15 DVCC 16 MODE 17 DATA_CLK ...
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Figure 3-2. Block Diagram CDEM AVCC SENS AGND DGND MIXVCC LNAGND LNA_IN ATA5743 4 FSK/ASK Dem_out Demodulator and data filter RSSI Limiter out Sensitivity IF Amp reduction 4. Order LPF Standby logic 3 MHz IF Amp VCO LPF 3 MHz ...
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RF Front-end The RF front-end of the receiver is a heterodyne configuration that converts the input signal into a 1 MHz IF signal. As seen in Amplifier (Local Oscillator), a mixer, and an RF amplifier. The LO ...
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This is described by the following formulas: MODE MODE The relation is designed to achieve the nominal IF frequency ...
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Figure 4-2. Input Matching Network with SAW Filter C3 L 22p 25n f = 433.92 MHz RF L2 TOKO LL2012 22n Figure 4-3. Input Matching Network without SAW Filter f = 433.92 MHz ...
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... ASK systems where Atmel’s PLL transmitter U2741B is used. IF The receiver ATA5743P6 employs an IF bandwidth of B together with the U2741B in ASK and FSK mode. If used in ASK applications, higher tolerances for the receiver and PLL transmitter crystals are allowed. SAW transmitters exhibit much higher transmit frequency tolerances compared to PLL transmitters ...
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Figure 5-1. 5.3 FSK/ASK Demodulator and Data Filter The signal coming from the RSSI amplifier is converted into the raw data signal by the ASK/FSK demodulator. The operating mode of the demodulator is set via the bit ASK/_FSK in the ...
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Receiving Characteristics The RF receiver ATA5743 can be operated with and without a SAW front-end filter typical automotive application, a SAW filter is used to achieve better selectivity. The selectivity with and without a SAW front-end filter ...
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Basic Clock Cycle of the Digital Circuitry The complete timing of the digital circuitry and the analog filtering is derived from one clock. As seen in tion with a divider. The division factor is controlled by the logical state ...
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Polling Mode As shown in three different modes. In sleep mode, the signal processing circuitry is disabled for the time period T nal processing circuits are enabled and settled. In the following bit-check mode, the incoming data stream is ...
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Figure 6-2. Polling Mode Flow Chart Sleep Mode: All circuits for signal processing are disabled. Only XTO and polling logic are enabled. Output level on pin IC_ACTIVE => low Soff T = Sleep X Sleep Sleep ...
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Figure 6-3. Timing Diagram for Complete Successful Bit Check (Number of checked Bits: 3) IC_ACTIVE Bit check Dem_out Data_out (DATA) T Start-up Start-up mode 6.3.1 Bit-check Mode In bit-check mode the incoming data stream is examined to distinguish between a ...
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The bit-check limits are determined by means of the formula below. T Lim_min T Lim_max Lim_min and Lim_max are defined by a 5-bit word each within the LIMIT register. Using the above formulas, Lim_min and Lim_max can be determined according ...
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Figure 6-7. Timing Diagram for Failed Bit Check (Condition: CV_Lim (Lim_min = 14, Lim_max = 24) IC_ACTIVE Bit check Dem_out Bit-check- 0 counter T Start-up Start-up mode 6.3.3 Duration of the Bit Check If no transmitter signal is present during ...
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Figure 6-8. Synchronization of the Demodulator Output T XClk Clock bit-check counter Dem_out Data_out (DATA) Figure 6-9. Debouncing of the Demodulator Output Dem_out Data_out (DATA) t DATA_min Figure 6-10. Steady L State Limited DATA Output Pattern After Transmission IC_ACTIVE Bit ...
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Switching the Receiver Back to Sleep Mode The receiver can be set back to polling mode via pin DATA or via pin POLLING/_ON. When using pin DATA, this pin must be pulled to Low by the connected microcontroller for ...
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Figure 6-13. Activating the Receiving Mode via Pin POLLING/_ON IC_ACTIVE POLLING/_ON Data_out (DATA) Serial bi-directional data line Figure 6-12 on page 18 POLLING/_ON. The pin POLLING/_ON must be held to low for the time period t positive edge on pin ...
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The limits for 2T are calculated as follows: Lower limit of 2T: Lim_min_2T = (Lim_min + Lim_max) - (Lim_max - Lim_min)/2 Upper limit of 2T: Lim_max_2T = (Lim_min + Lim_max) + (Lim_max - Lim_min)/2 Note: The data clock is available ...
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Figure 6-16. Data Clock Disappears Because of a Logical Error Dem_out Data_out (DATA) DATA_CLK Figure 6-17. Output of the Data Clock After a Successful Bit Check Dem_out Data_out (DATA) DATA_CLK The delay of the data clock is calculated as follows: ...
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Figure 6-18. Timing Characteristic of the Data Clock (Rising Edge on Pin DATA) Figure 6-19. Timing Characteristic of the Data Clock (Falling Edge on Pin DATA) 6.5 Digital Noise Suppression After a data transmission, digital noise appears on the data ...
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Figure 6-20. Output of Digital Noise at the End of the Data Stream Bit check ok Preburst Data_out (DATA) DATA_CLK Receiving mode, Bit-check data clock control mode logic active Figure 6-21. Automatic Noise Suppression Bit check ok Preburst Data_out (DATA) ...
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Figure 6-23. Controlled Noise Suppression Bit check ok Serial bi-directional Preburst data line (DATA_CLK) POLLING/_ON Bit-check mode 6.6 Configuration of the Receiver The ATA5743 receiver is configured via two 12-bit RAM registers called OPMODE and LIMIT. The registers can be ...
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Table 6-3. Effect of the Configuration Words Within the Registers Bit 1 Bit 2 Bit 3 Bit 4 1 BR_Range 0 1 Baud1 Baud0 BitChk1 Default values bits Lim_ Lim_ min5 min4 ...
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Table 6-6. Table 6-7. Sleep4 ... 0 ... Table 6-8. Table 6-9. ATA5743 26 Effect of the Configuration Bit Modulation Modulation ASK/_FSK 0 1 Effect of the Configuration Word Sleep Sleep Sleep3 Sleep2 ...
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Table 6-10. Effect of the Configuration Word Lim_min (1) Lim_min (Lim_min < Not Applicable) Lim_min5 Lim_min4 Lim_min3 ... ... ... ... ... ... ...
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The RM implies the following characteristics: • misinterpreted by the connected microcontroller. • If the receiver is set back to polling mode via pin DATA, RM cannot be cancelled by accident applied according to the ...
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Figure 6-26. Data Interface V/5 V Data_In Data_out The configuration registers are programmed serially via the bi-directional data line as demon- strated in To start programming, the microcontroller pulls the serial ...
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This period is used if the connected microcontroller detected RM. If the receiver operates in default mode, this time period for t1 can generally be used. Note that the capacitive load at pin DATA is limited. 6.6.3 Data Interface The ...
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Figure 6-28. Application Circuit 2 20% 10% GND X7R C13 X7R np0 25nH 150 pF COAX C17 2 np0 L2 Figure 6-29. Application Circuit: f ...
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Figure 6-30. Application Circuit 2 20% 10% GND X7R C13 X7R np0 25nH 150 pF 10% np0 COAX B3761 47 nH GND 5% 1, ...
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Electrical Characteristics All parameters refer to GND -40°C to +105°C, V amb (For typical values 5V 25°C) S amb Parameter Test Conditions Basic Clock Cycle of the Digital Circuitry MODE = 0 (USA) ...
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Electrical Characteristics (Continued) All parameters refer to GND -40°C to +105°C, V amb (For typical values 5V 25°C) S amb Parameter Test Conditions BR_Range = Maximum Low period at pin BR_Range0 DATA (see ...
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Electrical Characteristics (Continued) All parameters refer to GND -40°C to +105°C, V amb (For typical values 5V 25°C) S amb Parameter Test Conditions Time frame of a bit (see Figure 6-25) Programming pulse ...
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Electrical Characteristics (Continued) All parameters refer to GND -40°C to +105°C, V amb (For typical values 5V 25°C) S amb Parameters Current consumption LNA Mixer (Input Matched According to Third-order intercept point LO ...
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Electrical Characteristics (Continued) All parameters refer to GND -40°C to +105°C, V amb (For typical values 5V 25°C) S amb Parameters Analog Signal Processing Input sensitivity ASK 300 kHz IF-filter Input sensitivity ASK ...
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Electrical Characteristics (Continued) All parameters refer to GND -40°C to +105°C, V amb (For typical values 5V 25°C) S amb Parameters Input sensitivity FSK 300 kHz IF-filter Input sensitivity FSK 600 kHz IF-filter ...
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Electrical Characteristics (Continued) All parameters refer to GND -40°C to +105°C, V amb (For typical values 5V 25°C) S amb Parameters Sensitivity variation FSK for the full operating range including IF-filter compared to ...
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Electrical Characteristics (Continued) All parameters refer to GND -40°C to +105°C, V amb (For typical values 5V 25°C) S amb Parameters Reduced sensitivity variation over full operating range Reduced sensitivity variation for different ...
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... Ordering Information Extended Type Number ATA5743P3-TKQY ATA5743P3-TKSY ATA5743P6-TKQY ATA5743P6-TKSY ATA5743P3-TGQY ATA5743P3-TGSY ATA5743P6-TGQY ATA5743P6-TGSY 11. Package Information 4839B–RKE–08/05 Package Remarks SSO20 Taped and reeled, Pb-free, 300 kHz bandwidth SSO20 Tube, Pb-free, 300 kHz bandwidth SSO20 Taped and reeled, Pb-free, 600 kHz bandwidth ...
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Package SO20 Dimensions in mm 0.4 1. 12. Revision History Please note that the following page numbers referred to in this section refer to the specific revision mentioned, not to this document. Revision No. 4839B-RKE-08/05 ATA5743 42 12.95 ...
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