STA5620 STMicroelectronics, STA5620 Datasheet
STA5620
Specifications of STA5620
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STA5620 Summary of contents
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... The on-chip oscillator supports crystal frequencies in the range of 10MHz to 40MHz able to support TCXO providing also a buffered copy of the oscillator frequency. The chip, using STMicroelectronics BiCMOS SiGe technology, is housed in a QFN-32 package. Marking STA5620 VFQFPN32 Rev 4 STA5620 VFQFPN 32 Package Packing Tape & reel 1/29 www.st.com 1 ...
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... Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 5 Pin and I/O cells . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 5.1 Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 5.2 RF_EN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 5.3 CHIP_EN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 5.4 TEST_EN1, TEST_EN2 and TEST_CLK . . . . . . . . . . . . . . . . . . . . . . . . . 15 6 SPI bus protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 6.1 SPI_CS 6.2 SPI_CLK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 6.3 SPI_DI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 6.4 SPI_DO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 7 Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 2/29 STA5620 ...
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... STA5620 7.1 Register map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 7.2 PLL N divider . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 7.3 PLL R divider . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 7.4 Radio configuration register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 7.5 Test register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 7.6 Debug register (sub-circuit enables 7.7 Radio trimming register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 7.8 Receiver chain register (enable Chip enable and reset timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 8.1 Principle of operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 8.1.1 8.2 Default configuration ...
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... Register map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Table 7. PLL N divider . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Table 8. PLL R divider . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Table 9. Radio configuration register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Table 10. Test register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Table 11. Debug register (sub-circuit enables Table 12. Radio trimming register Table 13. Receiver chain register (enable Table 14. Operating modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Table 15. Default configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Table 16. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 4/29 STA5620 ...
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... STA5620 List of figures Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Figure 2. Pins connection diagram (bottom view Figure 3. SPI byte write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 4. SPI byte read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 5. Chip enable and reset timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Figure 6. VFQFPN32 (5x5x1.0 mm) mechanical data and package dimensions . . . . . . . . . . . . . . . 25 Figure 7. Reel, leader and trailer dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Figure 8. ...
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... CP 90˚ Test Logic / 48 SPI Interface <chip config> Reset reset Generator xtal_clk CHIP_EN IF_TEST IFB AGC 2 bits ADC mag mag GCE & RFE CMOS Drivers PFD / R GCE LO96 / 2 MST Xtal xtal_clk Xtal Osc XCE AC00324 XO XI STA5620 SIGN MAG GPS_CLK XTAL_CLK ...
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... STA5620 2 Pins description Table 2. Pins list description PIN Symbol AGC_CTRL RF_IN GND 7 GND XTAL_IN 13 XTAL_OUT 14 TEST_EN1 15 CHIP_EN 16 RF_EN 17 MODE 18 XTAL_CLK 19 GPS_CLK 20 TEST_CLK 21 TEST_EN2 22 SPI_DI 23 SPI_CLK 24 SPI_CS/ 25 SPI_DO 26 MAG 27 SIGN 28 GND_IO 29 V _IO IF_TEST Description IF section power supply Automatic Gain Control Pin ...
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... Pins description Figure 2. Pins connection diagram (bottom view) 8/ GND 6 GND RF_IN AGC_CTRL MODE 18 XTAL_CLK 19 GPS_CLK 20 TEST_CLK 21 TEST_EN2 22 SPI_DI 23 SPI_CLK 24 SPI_CS AC00325 STA5620 ...
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... STA5620 3 Functional description 3.1 RFA and MIXER section The 1575.42 MHz RF signal at the output of the external SAW filter is amplified amplifier (RFA) and then down converted by an image rejection mixer. The good performances of the cascade configuration and the technology choice guarantee a noise figure better than 4 typical conditions. In fact, the RFA gain is high enough to minimize the effects on the noise figure of the following integrated stages ...
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... Four lines are required to accomplish this task: a data input line (SPI_DI), a data output line (SPI_DO), a clock line (SPI_CLK) and a chip select line (SPI_CS/) active low. Any information can be passed to the RF receiver through the SPI interface depending on the CHIP_EN and RF_EN input pins status. 10/29 STA5620 ...
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... STA5620 3.9 Power control modes Three different power control modes can be chosen by means of the CHIP_EN and the RF_EN pins. If the CHIP_EN pin is forced low the device goes to stand-by mode with very low power consumption. On the other hand, if CHIP_EN is set high, two scenarios are possible: 1 ...
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... RFA – MIXER – IF FILTER – VGA f RFA Input frequency frequency IF G Conversion gain C 12/29 Parameter Parameter Test conditions Min 2.56 Internal blocks ON Crystal oscillator ON Internal blocks OFF VGA at max gain VGA at min gain STA5620 Min Max Unit -0.3 3.6 V -40 125 °C -65 150 ° 200 V - 750 ...
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... STA5620 Table 5. Electrical characteristics (continued 2 °C unless otherwise noted Symbol Parameter ΔG VGA range C V AGC Control Voltage Range AGC_CTRL G VGA sensitivity SENS NF RF-IF-VGA noise figure _RF-IF RF-IF-VGA 1dB input P _1dB compression point IRR Mixer image rejection ratio IFF IF filter cut-off frequency ...
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... This value is guaranteed by design. 2. Simulation data. 14/29 Test conditions Min 0.8·V CC 0.9· =10 pF, L from Slew-rate = fast C =10 pF, L from Slew-rate = slow C =10 pF, L from Slew-rate = fast C =10 pF, L from Slew-rate = slow STA5620 Typ Max Unit V 0.2· 0.1· ...
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... STA5620 5 Pin and I/O cells 5.1 Mode This pin allows a choice of initial configuration of the registers at reset. This pin will always be an input. In application this pin will be connected either LO or HI. When it is low the chip is configured to use 16.368 MHz as reference frequency, otherwise the reference frequency is 19 ...
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... SPI bus protocol The SPI port is used for data exchange between STA5620 and a GPS base band. The SPI port is controlled by four pins SPI_CLK, SPI_DI, SPI_DO and SPI_CS/. These pins are inputs only, except for SPI_DO, the data output. The SPI Bus protocol is based on a 2-phase transfer made of an address cycle and a data cycle ...
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... STA5620 7 Registers Register map 7.1 Table 6. Register map Address Bit 7 R/W 0xC0/40 - 0xC1/41 --------------------------------------------------- NDIV[7:0] ---------------------------------------------------- 0xC2/42 - 0xC3/43 0xD0/50 - 0xD1/51 ENM Reserved 0xD2/52 - 0xE0/60 RFE 7.2 PLL N divider Table 7. PLL N divider Register Name address 0x40 XXXX nnnn [3:0] NDIV 0x41 nnnn nnnn [7:0] 7 ...
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... LSR = 1 slow slew rate mode active XCE = 0 XTAL_CLK buffer is OFF 1 XCE = 1 XTAL_CLK buffer is ON GCE = 0 GPS_CLK buffer is OFF 1 GCE = 1 GPS_CLK buffer is ON 0100 Reserved bits Description MODE = 1 IFB = 0 The IF Buffer is OFF 0 IFB = 1 The IF Buffer is ON 000000 Reserved bits STA5620 ...
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... STA5620 7.6 Debug register (sub-circuit enables) Table 11. Debug register (sub-circuit enables) Register Name address VCO XXXX XXX y [0] PLL XXXX [1] RFA XXXX [2] MIX XXXX y XXX [3] 0x51 IF XXX y XXXX [4] AGC XXXX [5] Reserved X y XXXXXX [6] ENM y XXX XXXX [7] Default value Default value Bit ...
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... CPI = 01 100µA charge pump current 11 CPI = 10 150µA charge pump current CPI = 11 200µA charge pump current Loop filter control Description MODE = 1 110011 Reserved bits RFE = 0 The RF chain is controlled by RF_EN pin 0 RFE = 1 The RF chain is ON STA5620 ...
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... STA5620 8 Chip enable and reset timing Figure 5. Chip enable and reset timing VDD Power CHIP_EN MODE Internal Oscillator reset Xce (XTAL_CLK enable) <chip config> 8.1 Principle of operation With power supply applied and CHIP_EN inactive the chip is in stand-by mode consuming just a minimal leakage current (<10 µA). Applying CHIP_EN High turns-on the chip and starts the Crystal oscillator ...
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... All internal blocks OFF HIGH = VCC_IO; LOW = GND MODE LOW → sets the STA5620 internal dividers to work with 16.368 MHz reference and GPS_CLK = ON and XTAL_CLK = OFF; HIGH → sets the STA5620 internal dividers to work with 19.2 MHz reference and GPS_CLK = ON and XTAL_CLK = ON; ...
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... STA5620 8.2 Default configuration This table describes the default configuration of the STA5620 internal registers. Table 15. Default configuration Bit name Description Sample mode configuration MST Sample clock Source Selector Default xtal/TCXO frequency Power enable configuration RF Chain Enable ENM (From the RFA Input to the ...
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... Selector Output slew rate control XTAL_CLK, GPS_CLK, TEST_CLK, SPI_DO, SIGN LSR and MAG Output Drivers Slew Rate Note: Disabling a digital output buffer means driving it low. 24/29 Values (MODE_EN= 4095 µ 100 µ 150 µ 200 µ Fast 1 = Slow STA5620 (MODE_EN=1) 96 1555 ...
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... STA5620 9 Package information In order to meet environmental requirements, ST (also) offers these devices in ECOPACK® packages. ECOPACK® packages are lead-free. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label ...
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... Packing information 10 Packing information Figure 7. Reel, leader and trailer dimensions Tape sizes A max 12 mm 26/29 B min C 330 1.5 13 ±0.2 D min N min G 20.2 60 12.4 +2/-0 STA5620 T max 18.4 ...
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... STA5620 Figure 8. Carrier tape requirements Figure 9. Orientation Packing information 27/29 ...
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... Revision 1 Initial release. Modified the tables 7, 8, 10, 2 Updated Figure 3 and 4. Updated the following tables: 9, 10, 3 Updated the Figure 3 on page Document status promoted from preliminary data to datasheet. 4 Updated the Section 3.4: A/D STA5620 Changes 12 and 13. 11 and 13. 16. converter. ...
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... STA5620 Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. ...