TDA5230 Infineon Technologies, TDA5230 Datasheet - Page 109

• Manufacturer Part Number: TDA5230
• Description: IC RECEIVER ASK/FSK 28-TSSOP
• Manufacturer: Infineon Technologies
• Type: Receiverr

Specifications of TDA5230

• Package / Case: 28-TSSOP
• Frequency: 433MHz ~ 450MHz, 865MHz ~ 868MHz
• Sensitivity: -111dBm
• Data Rate - Maximum: 20 kbps
• Modulation Or Protocol: ASK, FSK
• Applications: RKE, TPM, Security Systems
• Current - Receiving: 8mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Voltage - Supply: 3 V ~ 3.6 V, 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 105°C
• Operating Frequency: 870 MHz
• Operating Supply Voltage: 3.3 V, 5 V
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Memory Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: SP000076520; TDA5230; TDA5230INTR

Dual:
ADDR:
TSI Gap Mode
The TSI GAP Mode is only used if TSI patterns contain a GAP that is not synchronous
to the data rate, e.g. if a GAP is 7.7 data bits, or if a GAP is longer than 10 data bits. In
all other cases, GAPs should be included in the TSI pattern as code violations.
Because of its complexity in configuration, TSI Gap Mode should be used only in
applications as noted above!
For these special protocols, it is possible to lock the actual frequency during a long Code
Violation period inside a TSI (TSIGAP must possess a minimum of 8 chips). After the
lock period, two different re-synchronization modes are available:
•
Figure 53
•
Data Sheet
7:0
Bit R/W Description
Preferred: phase readjustment only, TSIGRSYN = 0. In this mode, the GAPVAL
value is used to correct the phase after the GAP phase. Overall GAP time can be
defined in T/16 steps. The 5 MSB bits define the real GAP time and the 3 LSB bits
(GAPVAL) the DCO phase correction value.
Frequency readjustment (in this case, PLL starts from the beginning), TSIGRSYN =
1. In this mode the T/2 GAP resolution can be set in the 5 MSB TSIGAP register bits.
GAPVAL (3 LSB register bits) value is not used.
AEOMDTLEN
W
RUNIN
0x8B
DATLEN: Length of Data Field in Telegram
Counting starts after the last TSI Bit
Min: 00h = The next bit after TSI found (when EOM criterion is EMDATLEN)
will generate EOM
Max: FFh
and
Clock Recovery GAP Re-synchronization mode 0
< 1bit
valid data
0xAB
TSI A
and BEOMDTLEN:
all space or all mark
TSI GAP
PLL sync
105
EOM Data Length Limit
readjustment start point
clock recovery phase
GAPSync
Functional Description
valid data
Reset Value: 0x00
Version 4.0, 2007-06-01
TSI B
TDA523x