TDA5230 Infineon Technologies, TDA5230 Datasheet - Page 168

• Manufacturer Part Number: TDA5230
• Description: IC RECEIVER ASK/FSK 28-TSSOP
• Manufacturer: Infineon Technologies
• Type: Receiverr

Specifications of TDA5230

• Package / Case: 28-TSSOP
• Frequency: 433MHz ~ 450MHz, 865MHz ~ 868MHz
• Sensitivity: -111dBm
• Data Rate - Maximum: 20 kbps
• Modulation Or Protocol: ASK, FSK
• Applications: RKE, TPM, Security Systems
• Current - Receiving: 8mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Voltage - Supply: 3 V ~ 3.6 V, 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 105°C
• Operating Frequency: 870 MHz
• Operating Supply Voltage: 3.3 V, 5 V
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Memory Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: SP000076520; TDA5230; TDA5230INTR

RF Characteristics
Data Sheet
B.5
B.6
B.7
B.8
B.9
B.10 Brownout threshold
B.11 Receiver startup time
B.12 Channel Hop Latency Time
B.13 RF-Frontend startup delay
B.14 Interrupt duration
B 15 P_ON minimal pulse width
B 16
C.1
#
Supply current in Power Down
Mode
T
T
T
Supply current in Power Down
Mode
T
T
T
Supply current of IF buffer-
amplifier
Supply current of clock
generation unit
Receiver reset time
and
Configuration Change Latency
Time (Configuration A to B)
Minimal T
TDA5230
RF-PLL
Operational frequency band 1
Operational frequency band 2
amb
amb
amb
amb
amb
amb
= 25 °C
= 85 °C
= 105 °C
= 25 °C
= 85 °C
= 105 °C
Parameter
MasterPeriod
I
I
I
I
t
V
t
t
t
t
t
T
f
f
VDDpdwn
VDDpdwn
buff
VDDclock
Reset
RXstartup
CHHOP
RFstartdelay
INT
P_ON
band1
band2
MasterPeriod
BOR
Symbol
0,8
119
12
72
1
100
5
433
865
164
min.
Limit Values
0.6
3
6
0.8
2.5
5
0.5
20
2,45
Note 1 119
Note 1 12
Note 1 72
Note 1
Note 3
Note 4
typ.
1.5
12
25
1.5
10
20
0.7
25
5
1
450
870
max.
µA
µA
µA
µA
µA
µA
mA
µA
ms
V
64*T
Note 2
64*T
64*T
64*T
µs
ms
MHz
MHz
Unit
Version 4.0, 2007-06-01
sys
sys
sys
sys
VDD5V = VDDA =
VDDD = 3.6 V
VDD5V = 5.5 V
P
f
C
Time to startup
RF-Frontend
(comprises time
required to switch
crystal oscillator
from low power to
high precision
mode)
Time to switch
RF-PLL between
different RF-
Channels. (does
not include settling
of the data clock
recovery.)
Delay of startup of
RF-Frontend
Pulse width of
interrupt
Minimum pulse
width to reset the
chip
Minimal
Masterperiod for
stable operation
Lo-Side
LO Injection
CLKOUT
Test Conditions
in
Load
Specifications
< -50 dBm
=10 pF
=1 kHz
TDA523x
∗
*
*
*
*
*
*