TDA5230 Infineon Technologies, TDA5230 Datasheet - Page 42

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TDA5230

Manufacturer Part Number
TDA5230
Description
IC RECEIVER ASK/FSK 28-TSSOP
Manufacturer
Infineon Technologies
Type
Receiverr
Datasheet

Specifications of TDA5230

Package / Case
28-TSSOP
Frequency
433MHz ~ 450MHz, 865MHz ~ 868MHz
Sensitivity
-111dBm
Data Rate - Maximum
20 kbps
Modulation Or Protocol
ASK, FSK
Applications
RKE, TPM, Security Systems
Current - Receiving
8mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Voltage - Supply
3 V ~ 3.6 V, 4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 105°C
Operating Frequency
870 MHz
Operating Supply Voltage
3.3 V, 5 V
Maximum Operating Temperature
+ 105 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Memory Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
SP000076520
TDA5230
TDA5230INTR

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2.4.5.3
This state (item 12 in the state diagram
chip in Slave-Mode. This state can be reached after the Startup Sequencer and
Initialization of the chip has been finished from any state from 3 to 11. To reconfigure the
chip the SFR control bit HOLD must be set. After reconfiguration in this state the SFR
control bit HOLD has to be cleared again. After leaving the HOLD state, the INIT state is
entered and the receiver loads the new settings. Be aware that the time between
changing the configuration and reinitialization of the chip must be at least 40 µs. Take
note that one SPI command for clearing the SFR control bit needs 24 bits or 20 µs at the
highest SPI data rate. The remaining 20 µs must be guaranteed by the application.
Figure 19
HOLD Mode should only be entered from Run Mode Slave. Configuration changes in
Self Polling Mode should be done by switching to SLEEP Mode and returning to Self
Polling Mode after reconfiguration
CMC1:
ADDR:
.
2.4.5.4
The SLEEP Mode is a power save mode. The complete RF part is switched off and the
oscillator is in Low Precision Mode. Like in HOLD mode, the chip can be reconfigured.
When switching from SLEEP to Run Mode Slave, the state machine starts with the
internal Start Up Sequence.
Data Sheet
SPI Command
Bit R/W Description
6
FSM State
W
0x03
Chip Mode Control Register 1
HOLD Mode
SLEEP Mode
HOLD: Holds the chip in the config state (only in Run Mode Slave)
0: Normal Operation
1: Jump into the config state Hold
Instruction
Hold State Behavior
Write
0x02
EOM-Check
Address
CMC1
0x03
HOLD=1
Data
0x40
Instruction
Write
0x02
Address
RFPLL1
0x22
Figure 17
Data
0x55
38
) is used for fast reconfiguration of the
HOLD
40us
Instruction
Write
0x02
20us @ 1.2MHz
Functional Description
Address
CMC1
0x03
Reset Value: 0x00
Version 4.0, 2007-06-01
HOLD=0
Data
0x00
INIT
TDA523x
Wait till
SSync

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