MRF49XA-I/ST Microchip Technology, MRF49XA-I/ST Datasheet - Page 31

• Manufacturer Part Number: MRF49XA-I/ST
• Description: IC RF TXRX 433/868/915 16-TSSOP
• Manufacturer: Microchip Technology

Specifications of MRF49XA-I/ST

• Package / Case: 16-TSSOP
• Frequency: 433MHz, 868MHz, 915MHz
• Data Rate - Maximum: 256kbps
• Modulation Or Protocol: FHSS, FSK
• Applications: Home / Industrial Automation, Remote Access, Security Alarms
• Power - Output: 7dbm
• Sensitivity: -110dBm
• Voltage - Supply: 2.2 V ~ 3.8 V
• Current - Receiving: 11mA
• Current - Transmitting: 15mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Number Of Receivers: 1
• Number Of Transmitters: 2
• Wireless Frequency: 433 MHz to 915 MHz
• Output Power: + 7 dBm
• Operating Supply Voltage: 2.5 V, 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Modulation: FHSS, FSK
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 579-MRF49XA-1/ST

REGISTER 2-8:
© 2009 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-8
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2-0
Note 1:
ACRLC
R/W-1
R/W-0
2:
The digital filter is a digital version of a simple RC low-pass filter followed by a comparator with hysteresis.
The time constant for the digital filter is automatically calculated based on the bit rate set in the DRSREG.
The bit rate in this mode should not exceed 115 kbps. In analog RC filter, the demodulator output is fed to
the RCLKOUT/FCAP/FINT pin over a 10 kΩ resistor. The filter cutoff frequency is set by the external
capacitor connected to this pin and V
data rates.
The DQI parameter is calculated using Equation 2-3. The DQI parameter in BBFCREG should be chosen
according to the following rules:
- The parameter should be > 4, otherwise, noise might be treated as a valid FSK signal.
- The maximum value is 7.
CCB<15:8>: Command Code bits
The command code bits (11000010b) are serially sent to the microcontroller to identify the bits to be
written in the BBFCREG.
ACRLC: Automatic Clock Recovery Lock Control bit
1 = Configures the clock recovery lock control as automatic. In this setting, the clock recovery starts
0 = Clock recovery lock is controlled in Manual mode
MCRLC: Manual Clock Recovery Lock Control bit
1 = Configures the clock recovery lock control to Fast mode. Fast mode requires a preamble of at
0 = Configures the clock recovery lock control to Slow mode. Slow mode takes a bit longer period and
Reserved: Write as ‘1’
FTYPE: Filter Type bit
1 = Configures the baseband filter as an analog RC low-pass filter
0 = Configures the baseband filter as a digital filter
Reserved: Write as ‘1’
DQTI<2:0>: Data Quality Threshold Indicator bits
The threshold parameter for the DQI should be set to less than four to report good signal quality if the
bit rate is close to the deviation. Usually, if the data rate falls less than the deviation, a higher threshold
parameter is permitted and might report a good signal quality.
MCRLC
R/W-1
R/W-0
least 6-8 bits to determine the clock rate and then it locks.
requires a preamble of at least 12-16 bits to determine the clock rate and then it locks. Slow mode
requires more accurate bit timing. See Register 2-12 for the relationship between data rate and
clock recovery.
in Fast mode and automatically switches to Slow mode after locking
BBFCREG: BASEBAND FILTER CONFIGURATION REGISTER (POR: 0xC22C)
r = reserved bit
W = Writable bit
‘1’ = Bit is set
R/W-0
R/W-1
r
FTYPE
R/W-0
R/W-0
SS
Preliminary
. Table 2-7 shows the optimum filter capacitor values for different
CCB<15:8>
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
R/W-1
r
(1)
R/W-0
R/W-1
(2)
DQTI<2:0>
x = Bit is unknown
MRF49XA
R/W-1
R/W-0
DS70590B-page 29
R/W-0
R/W-0
bit 8
bit 0