EM357-RTR Ember, EM357-RTR Datasheet - Page 209

IC RF TXRX ZIGBEE 192KB 48QFN

EM357-RTR

Manufacturer Part Number
EM357-RTR
Description
IC RF TXRX ZIGBEE 192KB 48QFN
Manufacturer
Ember
Datasheets

Specifications of EM357-RTR

Frequency
2.4GHz
Data Rate - Maximum
250kbps
Modulation Or Protocol
802.15.4 Zigbee
Applications
General Purpose
Power - Output
5dBm
Sensitivity
-100dBm
Voltage - Supply
2.1 V ~ 3.6 V
Current - Receiving
26mA
Current - Transmitting
31mA
Data Interface
PCB, Surface Mount
Memory Size
192kB Flash, 12kB RAM
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
48-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
636-1011-2

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11.3
11.4
Non-maskable Interrupt (NMI)
Faults
The non-maskable interrupt (NMI) is a special case. Despite being one of the 10 standard ARM
NVIC interrupts, it is sourced from the Event Manager like a peripheral interrupt. The NMI has two second-
level sources; failure of the 24 MHz crystal and watchdog low water mark.
1. Failure of the 24MHz crystal: If the EM35x’s main clock, SYSCLK, is operating from the 24 MHz crystal and
2. Watchdog low water mark: If the EM35x’s watchdog is active and the watchdog counter has not been
Four of the exceptions in the NVIC are faults: Hard Fault, Memory Fault, Bus Fault, and Usage Fault. Of these,
three (Hard Fault, Memory Fault, and Usage Fault) are standard ARM
The Bus Fault, though, is derived from EM35x-specific sources. The Bus Fault sources are recorded in the
SCS_AFSR register. Note that it is possible for one access to set multiple SCS_AFSR bits. Also note that MPU
configurations could prevent most of these bus fault accesses from occurring, with the advantage that illegal
writes are made precise faults. The four bus faults are:
the crystal fails, the EM35x detects the failure and automatically switches to the internal 12 MHz RC clock.
When this failure detection and switch has occurred, the EM35x triggers the CLK24M_FAIL second-level
interrupt, which then triggers the NMI.
reset for nominally 1.792 seconds, the watchdog triggers the WATCHDOG_INT second-level interrupt,
which then triggers the NMI.
WRONGSIZE – Generated by an 8-bit or 16-bit read or write of an APB peripheral register. This fault can
also result from an unaligned 32-bit access.
PROTECTED – Generated by a user mode (unprivileged) write to a system APB or AHB peripheral or
protected RAM (see Chapter 5, Section 5.2.2.3).
RESERVED – Generated by a read or write to an address within an APB peripheral’s 4 kB block range, but
the address is above the last physical register in that block range. Also generated by a read or write to an
address above the top of RAM or flash.
MISSED – Generated by a second SCS_AFSR fault. In practice, this bit is not seen since a second fault also
generates a hard fault, and the hard fault preempts the bus fault.
Final
11-6
®
Cortex
TM
-M3 exceptions.
EM351 / EM357
®
Cortex
120-035X-000G
TM
-M3

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