ATA5773-PXQW Atmel, ATA5773-PXQW Datasheet - Page 42

• Manufacturer Part Number: ATA5773-PXQW
• Description: XMITTR UHF ASK/FSK 310MHZ 24VQFN
• Manufacturer: Atmel

Specifications of ATA5773-PXQW

• Frequency: 310MHz ~ 350MHz
• Modulation Or Protocol: UHF
• Power - Output: 8dBm
• Voltage - Supply: 2 V ~ 4 V
• Current - Transmitting: 9.8mA
• Data Interface: PCB, Surface Mount
• Memory Size: 4kB Flash, 256B EEPROM, 256B SRAM
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 24-VQFN Exposed Pad, 24-HVQFN, 24-SQFN, 24-DHVQFN
• Processor Series: ATA5x
• Core: AVR8
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 4 KB
• Data Ram Size: 256 B
• Interface Type: SPI, USI
• Maximum Clock Frequency: 4 MHz
• Number Of Programmable I/os: 12
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Applications: -
• Sensitivity: -
• Data Rate - Maximum: -
• Current - Receiving: -
• Lead Free Status / Rohs Status: Details

4.10.3
4.10.4
4.10.5
4.10.6
4.10.7
42
Atmel ATA5771/73/74
ADC Noise Reduction Mode
Power-down Mode
Standby Mode
Power Reduction Register
Minimizing Power Consumption
When the SM1..0 bits are written to 01, the SLEEP instruction makes the MCU enter ADC
Noise Reduction mode, stopping the CPU but allowing the ADC, the external interrupts, and
the Watchdog to continue operating (if enabled). This sleep mode halts clk
FLASH
This improves the noise environment for the ADC, enabling higher resolution measurements.
If the ADC is enabled, a conversion starts automatically when this mode is entered. Apart form
the ADC Conversion Complete interrupt, only an External Reset, a Watchdog Reset, a
Brown-out Reset, an SPM/EEPROM ready interrupt, an external level interrupt on INT0 or a
pin change interrupt can wake up the MCU from ADC Noise Reduction mode.
When the SM1..0 bits are written to 10, the SLEEP instruction makes the MCU enter
Power-down mode. In this mode, the Oscillator is stopped, while the external interrupts, and
the Watchdog continue operating (if enabled). Only an External Reset, a Watchdog Reset, a
Brown-out Reset, an external level interrupt on INT0, or a pin change interrupt can wake up
the MCU. This sleep mode halts all generated clocks, allowing operation of asynchronous
modules only.
Note that if a level triggered interrupt is used for wake-up from Power-down mode, the
changed level must be held for some time to wake up the MCU. See
Interrupts” on page 57
When the SM1..0 bits are 11 and an external crystal/resonator clock option is selected, the
SLEEP instruction makes the MCU enter Standby mode. This mode is identical to
Power-down with the exception that the Oscillator is kept running. From Standby mode, the
device wakes up in six clock cycles.
The Power Reduction Register (PRR), see
ter” on page
consumption. The current state of the peripheral is frozenand the I/O registers can not be read
or written. Resources used by the peripheral when stopping the clock will remain occupied,
hence the peripheral should in most cases be disabled before stopping the clock. Waking up a
module, which is done by clearing the bit in PRR, puts the module in the same state as before
shutdown.
Module shutdown can be used in Idle mode and Active mode to significantly reduce the overall
power consumption. See
ples. In all other sleep modes, the clock is already stopped.
There are several issues to consider when trying to minimize the power consumption in an
Atmel
ble, and the sleep mode should be selected so that as few as possible of the device’s
functions are operating. All functions not needed should be disabled. In particular, the follow-
ing modules may need special consideration when trying to achieve the lowest possible power
consumption.
, while allowing the other clocks to run.
®
AVR
®
44, provides a method to stop the clock to individualperipherals to reduce power
controlled system. In general, sleep modes should be used as much as possi-
for details
Section 8.3.8.4 “Power-down Supply Current” on page 200
Section 4.10.8.2 “PRR – Power Reduction Regis-
Section 4.13 “External
I/O
, clk
9137E–RKE–12/10
CPU
for exam-
, and clk-