ATA5773-PXQW Atmel, ATA5773-PXQW Datasheet - Page 88

• Manufacturer Part Number: ATA5773-PXQW
• Description: XMITTR UHF ASK/FSK 310MHZ 24VQFN
• Manufacturer: Atmel

Specifications of ATA5773-PXQW

• Frequency: 310MHz ~ 350MHz
• Modulation Or Protocol: UHF
• Power - Output: 8dBm
• Voltage - Supply: 2 V ~ 4 V
• Current - Transmitting: 9.8mA
• Data Interface: PCB, Surface Mount
• Memory Size: 4kB Flash, 256B EEPROM, 256B SRAM
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 24-VQFN Exposed Pad, 24-HVQFN, 24-SQFN, 24-DHVQFN
• Processor Series: ATA5x
• Core: AVR8
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 4 KB
• Data Ram Size: 256 B
• Interface Type: SPI, USI
• Maximum Clock Frequency: 4 MHz
• Number Of Programmable I/os: 12
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Applications: -
• Sensitivity: -
• Data Rate - Maximum: -
• Current - Receiving: -
• Lead Free Status / Rohs Status: Details

4.15.9
4.15.9.1
88
Atmel ATA5771/73/74
Register Description
TCCR0A – Timer/Counter Control Register A
• Bits 7:6 – COM0A1:0: Compare Match Output A Mode
These bits control the Output Compare pin (OC0A) behavior. If one or both of the COM0A1:0
bits are set, the OC0A output overrides the normal port functionality of the I/O pin it is con-
nected to. However, note that the Data Direction Register (DDR) bit corresponding to the
OC0A pin must be set in order to enable the output driver.
When OC0A is connected to the pin, the function of the COM0A1:0 bits depends on the
WGM02:0 bit setting.
bits are set to a normal or CTC mode (non-PWM).
Table 4-31.
Table 4-32
mode.
Table 4-32.
Note:
Bit
0x30 (0x50)
Read/Write
Initial Value
COM01
COM01
0
0
1
1
0
0
1
1
1. A special case occurs when OCR0A equals TOP and COM0A1 is set. In this case, the Com-
shows the COM0A1:0 bit functionality when the WGM01:0 bits are set to fast PWM
pare Match is ignored, but the set or clear is done at BOTTOM. See
PWM Mode” on page 83
COM0A1
Compare Output Mode, non-PWM Mode
Compare Output Mode, Fast PWM Mode
R/W
7
0
COM00
COM00
0
1
0
1
0
1
0
1
Table 4-31
COM0A0
R/W
6
0
Description
Normal port operation, OC0A disconnected.
WGM02 = 0: Normal Port Operation, OC0A Disconnected.
WGM02 = 1: Toggle OC0A on Compare Match.
Clear OC0A on Compare Match, set OC0A at BOTTOM
(non-inverting mode)
Set OC0A on Compare Match, clear OC0A at BOTTOM
(inverting mode)
Description
Normal port operation, OC0A disconnected.
Toggle OC0A on Compare Match
Clear OC0A on Compare Match
Set OC0A on Compare Match
COM0B1
for more details.
shows the COM0A1:0 bit functionality when the WGM02:0
R/W
5
0
COM0B0
R/W
4
0
R
3
0
–
(1)
R
2
–
0
WGM01
R/W
1
0
Section 4.15.7.3 “Fast
WGM00
R/W
0
0
9137E–RKE–12/10
TCCR0A