ATA5771-PXQW Atmel, ATA5771-PXQW Datasheet - Page 95

• Manufacturer Part Number: ATA5771-PXQW
• Description: XMITTR UHF ASK/FSK 868MHZ 24VQFN
• Manufacturer: Atmel

Specifications of ATA5771-PXQW

• Frequency: 868MHz ~ 928MHz
• Modulation Or Protocol: UHF
• Power - Output: 8dBm
• Voltage - Supply: 2 V ~ 4 V
• Current - Transmitting: 9.8mA
• Data Interface: PCB, Surface Mount
• Memory Size: 4kB Flash, 256B EEPROM, 256B SRAM
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 24-VQFN Exposed Pad, 24-HVQFN, 24-SQFN, 24-DHVQFN
• Processor Series: ATA5x
• Core: AVR8
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 4 KB
• Data Ram Size: 256 B
• Interface Type: SPI, USI
• Maximum Clock Frequency: 4 MHz
• Number Of Programmable I/os: 12
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Applications: -
• Sensitivity: -
• Data Rate - Maximum: -
• Current - Receiving: -
• Lead Free Status / Rohs Status: Details

4.16.2.1
9137E–RKE–12/10
Registers
Figure 4-37. 16-bit Timer/Counter Block Diagram
The Timer/Counter (TCNT1), Output Compare Registers (OCR1A/B), and Input Capture Reg-
ister (ICR1) are all 16-bit registers. Special procedures must be followed when accessing the
16-bit registers. These procedures are described in the section
16-bit Registers” on page
isters and have no CPU access restrictions. Interrupt requests (abbreviated to Int.Req. in the
figure) signals are all visible in the Timer Interrupt Flag Register (TIFR). All interrupts are indi-
vidually masked with the Timer Interrupt Mask Register (TIMSK). TIFR and TIMSK are not
shown in the figure.
The Timer/Counter can be clocked internally, via the prescaler, or by an external clock source
on the T1 pin. The Clock Select logic block controls which clock source and edge the
Timer/Counter uses to increment (or decrement) its value. The Timer/Counter is inactive when
no clock source is selected. The output from the Clock Select logic is referred to as the timer
clock (clk
T
1
).
Timer/Counter
TCCRnA
OCRnA
OCRnB
TCNTn
ICRn
=
=
97. The Timer/Counter Control Registers (TCCR1A/B) are 8-bit reg-
Direction
Count
Clear
Control Logic
TOP
=
TCCRnB
Values
BOTTOM
Fixed
TOP
ICFn (Int.Req.)
clk
Detector
Edge
=
Tn
Atmel ATA5771/73/74
0
OCnA
(Int.Req.)
OCnB
(Int.Req.)
TOVn
(Int.Req.)
Clock Select
Generation
Generation
( From Prescaler )
Waveform
Waveform
Canceler
Detector
Section 4.16.3 “Accessing
Noise
Edge
Comparator Ouput )
( From Analog
OCnA
OCnB
ICPn
Tn
95