ATMEGA128RFA1-ZUR Atmel, ATMEGA128RFA1-ZUR Datasheet - Page 160

IC AVR MCU 2.4GHZ XCEIVER 64QFN

ATMEGA128RFA1-ZUR

Manufacturer Part Number
ATMEGA128RFA1-ZUR
Description
IC AVR MCU 2.4GHZ XCEIVER 64QFN
Manufacturer
Atmel
Series
ATMEGAr

Specifications of ATMEGA128RFA1-ZUR

Frequency
2.4GHz
Data Rate - Maximum
2Mbps
Modulation Or Protocol
802.15.4 Zigbee
Applications
General Purpose
Power - Output
3.5dBm
Sensitivity
-100dBm
Voltage - Supply
1.8 V ~ 3.6 V
Current - Receiving
12.5mA
Current - Transmitting
14.5mA
Data Interface
PCB, Surface Mount
Memory Size
128kB Flash, 4kB EEPROM, 16kB RAM
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN, Exposed Pad
Processor Series
ATMEGA128x
Core
AVR8
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
128 KB
Data Ram Size
16 KB
Interface Type
JTAG
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
38
Number Of Timers
6
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVR128RFA1-EK1
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA128RFA1-ZUR
Manufacturer:
ON
Quantity:
56 000
Output
Compare
Modulator
(OCM1C2)
Overview
Description
160
ATmega128
The Output Compare Modulator (OCM) allows generation of waveforms modulated with a carrier
frequency. The modulator uses the outputs from the Output Compare Unit C of the 16-bit
Timer/Counter1 and the Output Compare Unit of the 8-bit Timer/Counter2. For more details
about these Timer/Counters see
on page 111
available in ATmega103 compatibility mode.
Figure 72. Output Compare Modulator, Block Diagram
When the modulator is enabled, the two output compare channels are modulated together as
shown in the block diagram
The Output Compare unit 1C and Output Compare unit 2 shares the PB7 port pin for output. The
outputs of the Output Compare units (OC1C and OC2) overrides the normal PORTB7 Register
when one of them is enabled (i.e., when COMnx1:0 is not equal to zero). When both OC1C and
OC2 are enabled at the same time, the modulator is automatically enabled.
The functional equivalent schematic of the modulator is shown on
includes part of the Timer/Counter units and the port B pin 7 output driver circuit.
Figure 73. Output Compare Modulator, Schematic
( From Waveform Generator )
( From Waveform Generator )
COM21
COM20
COM1C1
COM1C0
and
Timer/Counter 1
Timer/Counter 2
“8-bit Timer/Counter2 with PWM” on page
PORTB7
D
OC1C
D
D
OC2
Q
Q
Q
(Figure
“16-bit Timer/Counter (Timer/Counter1 and Timer/Counter3)”
DATABUS
72).
OC1C
OC2
Modulator
0
1
145. Note that this feature is not
DDRB7
D
Q
1
0
Figure
OC2 / PB7
OC1C /
Pin
73. The schematic
2467V–AVR–02/11
Vcc
OC2 / PB7
OC1C /
Pin

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