ATMEGA128RFA1-ZU Atmel, ATMEGA128RFA1-ZU Datasheet - Page 138

IC AVR MCU 2.4GHZ XCEIVER 64QFN

ATMEGA128RFA1-ZU

Manufacturer Part Number
ATMEGA128RFA1-ZU
Description
IC AVR MCU 2.4GHZ XCEIVER 64QFN
Manufacturer
Atmel
Series
ATMEGAr

Specifications of ATMEGA128RFA1-ZU

Frequency
2.4GHz
Data Rate - Maximum
2Mbps
Modulation Or Protocol
802.15.4 Zigbee
Applications
General Purpose
Power - Output
3.5dBm
Sensitivity
-100dBm
Voltage - Supply
1.8 V ~ 3.6 V
Current - Receiving
12.5mA
Current - Transmitting
14.5mA
Data Interface
PCB, Surface Mount
Memory Size
128kB Flash, 4kB EEPROM, 16kB RAM
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN, Exposed Pad
Rf Ic Case Style
QFN
No. Of Pins
64
Supply Voltage Range
1.8V To 3.6V
Operating Temperature Range
-40°C To +85°C
Svhc
No SVHC (15-Dec-2010)
Rohs Compliant
Yes
Processor Series
ATMEGA128x
Core
AVR8
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
128 KB
Data Ram Size
16 KB
Interface Type
JTAG
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
38
Number Of Timers
6
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVR128RFA1-EK1
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Output Compare
Register 3 B –
OCR3BH and OCR3BL
Output Compare
Register 3 C –
OCR3CH and OCR3CL
Input Capture Register
1 – ICR1H and ICR1L
Input Capture Register
3 – ICR3H and ICR3L
Timer/Counter
Interrupt Mask
Register – TIMSK
138
ATmega128
The Output Compare Registers contain a 16-bit value that is continuously compared with the
counter value (TCNTn). A match can be used to generate an output compare interrupt, or to
generate a waveform output on the OCnx pin.
The Output Compare Registers are 16-bit in size. To ensure that both the high and low bytes are
written simultaneously when the CPU writes to these registers, the access is performed using an
8-bit temporary High Byte Register (TEMP). This Temporary Register is shared by all the other
16-bit registers.
The Input Capture is updated with the counter (TCNTn) value each time an event occurs on the
ICPn pin (or optionally on the Analog Comparator Output for Timer/Counter1). The Input Cap-
ture can be used for defining the counter TOP value.
The Input Capture Register is 16-bit in size. To ensure that both the high and low bytes are read
simultaneously when the CPU accesses these registers, the access is performed using an 8-bit
temporary High Byte Register (TEMP). This Temporary Register is shared by all the other 16-bit
registers.
Note:
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
This register contains interrupt control bits for several Timer/Counters, but only Timer1 bits are
described in this section. The remaining bits are described in their respective timer sections.
See “Accessing 16-bit Registers” on page 114.
OCIE2
R/W
R/W
R/W
R/W
R/W
7
0
7
0
7
0
7
0
7
0
See “Accessing 16-bit Registers” on page 114.
TOIE2
R/W
R/W
R/W
R/W
R/W
6
0
6
0
6
0
6
0
6
0
TICIE1
R/W
R/W
R/W
R/W
R/W
5
0
5
0
5
0
5
0
5
0
OCIE1A
R/W
R/W
R/W
R/W
R/W
OCR3B[15:8]
OCR3C[15:8]
4
OCR3B[7:0]
0
4
OCR3C[7:0]
0
4
0
4
0
4
0
ICR1[15:8]
ICR3[15:8]
ICR1[7:0]
ICR3[7:0]
OCIE1B
R/W
R/W
R/W
R/W
R/W
3
0
3
0
3
0
3
0
3
0
TOIE1
R/W
R/W
R/W
R/W
R/W
2
0
2
0
2
0
2
0
2
0
OCIE0
R/W
R/W
R/W
R/W
R/W
1
0
1
0
1
0
1
0
1
0
TOIE0
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
0
0
OCR3BH
OCR3CH
OCR3BL
OCR3CL
ICR1H
ICR3H
ICR1L
ICR3L
TIMSK
2467V–AVR–02/11

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