ATMEGA128RFA1-ZU Atmel, ATMEGA128RFA1-ZU Datasheet - Page 288

IC AVR MCU 2.4GHZ XCEIVER 64QFN

ATMEGA128RFA1-ZU

Manufacturer Part Number
ATMEGA128RFA1-ZU
Description
IC AVR MCU 2.4GHZ XCEIVER 64QFN
Manufacturer
Atmel
Series
ATMEGAr

Specifications of ATMEGA128RFA1-ZU

Frequency
2.4GHz
Data Rate - Maximum
2Mbps
Modulation Or Protocol
802.15.4 Zigbee
Applications
General Purpose
Power - Output
3.5dBm
Sensitivity
-100dBm
Voltage - Supply
1.8 V ~ 3.6 V
Current - Receiving
12.5mA
Current - Transmitting
14.5mA
Data Interface
PCB, Surface Mount
Memory Size
128kB Flash, 4kB EEPROM, 16kB RAM
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN, Exposed Pad
Rf Ic Case Style
QFN
No. Of Pins
64
Supply Voltage Range
1.8V To 3.6V
Operating Temperature Range
-40°C To +85°C
Svhc
No SVHC (15-Dec-2010)
Rohs Compliant
Yes
Processor Series
ATMEGA128x
Core
AVR8
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
128 KB
Data Ram Size
16 KB
Interface Type
JTAG
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
38
Number Of Timers
6
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVR128RFA1-EK1
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Price
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Latching of Fuses
288
ATmega128
Table 118. Fuse High Byte
Notes:
Table 119. Fuse Low Byte
Notes:
The status of the Fuse bits is not affected by Chip Erase. Note that the Fuse bits are locked if
Lock bit1 (LB1) is programmed. Program the Fuse bits before programming the Lock bits.
The Fuse values are latched when the device enters Programming mode and changes of the
fuse values will have no effect until the part leaves Programming mode. This does not apply to
Fuse High
Byte
OCDEN
JTAGEN
SPIEN
CKOPT
EESAVE
BOOTSZ1
BOOTSZ0
BOOTRST
Fuse Low
Byte
BODLEVEL
BODEN
SUT1
SUT0
CKSEL3
CKSEL2
CKSEL1
CKSEL0
(1)
1. The SPIEN fuse is not accessible in SPI Serial Programming mode.
2. The CKOPT fuse functionality depends on the setting of the CKSEL bits. See
3. The default value of BOOTSZ1..0 results in maximum Boot Size. See
4. Never ship a product with the OCDEN Fuse programmed regardless of the setting of lock bits
5. If the JTAG interface is left unconnected, the JTAGEN fuse should if possible be disabled. This
1. The default value of SUT1..0 results in maximum start-up time. See
2. The default setting of CKSEL3..0 results in Internal RC Oscillator @ 1MHz. See
(2)
(4)
(5)
Sources” on page 36
and the JTAGEN Fuse. A programmed OCDEN Fuse enables some parts of the clock system
to be running in all sleep modes. This may increase the power consumption.
to avoid static current at the TDO pin in the JTAG interface.
details.
page 36
Bit No.
Bit No.
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
for details.
Description
Enable OCD
Enable JTAG
Enable
Data Downloading
Oscillator options
EEPROM memory is preserved
through the Chip Erase
Select Boot Size (see
for details)
Select Boot Size (see
for details)
Select Reset Vector
Description
Brown out detector trigger level
Brown out detector enable
Select start-up time
Select start-up time
Select Clock source
Select Clock source
Select Clock source
Select Clock source
Serial Program and
for details.
Table 112
Table 112
Default Value
1 (unprogrammed)
1 (unprogrammed, BOD disabled)
1 (unprogrammed)
0 (programmed)
0 (programmed)
0 (programmed)
0 (programmed)
1 (unprogrammed)
Default Value
1 (unprogrammed, OCD
disabled)
0 (programmed, JTAG enabled)
0 (programmed, SPI prog.
enabled)
1 (unprogrammed)
1 (unprogrammed, EEPROM not
preserved)
0 (programmed)
0 (programmed)
1 (unprogrammed)
(1)
(2)
(2)
(2)
(3)
(3)
(1)
(2)
Table 14 on page 41
Table 112 on page 284
2467V–AVR–02/11
Table 6 on
“Clock
for

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