ATMEGA128RFA1-ZU Atmel, ATMEGA128RFA1-ZU Datasheet - Page 372

• Manufacturer Part Number: ATMEGA128RFA1-ZU
• Description: IC AVR MCU 2.4GHZ XCEIVER 64QFN
• Manufacturer: Atmel
• Series: ATMEGAr

Specifications of ATMEGA128RFA1-ZU

• Frequency: 2.4GHz
• Data Rate - Maximum: 2Mbps
• Modulation Or Protocol: 802.15.4 Zigbee
• Applications: General Purpose
• Power - Output: 3.5dBm
• Sensitivity: -100dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Current - Receiving: 12.5mA
• Current - Transmitting: 14.5mA
• Data Interface: PCB, Surface Mount
• Memory Size: 128kB Flash, 4kB EEPROM, 16kB RAM
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN, Exposed Pad
• Rf Ic Case Style: QFN
• No. Of Pins: 64
• Supply Voltage Range: 1.8V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Svhc: No SVHC (15-Dec-2010)
• Rohs Compliant: Yes
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 128 KB
• Data Ram Size: 16 KB
• Interface Type: JTAG
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 38
• Number Of Timers: 6
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVR128RFA1-EK1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

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ATmega128
4. Stabilizing time needed when changing OSCCAL Register
5. IDCODE masks data from TDI input
6. Reading EEPROM by using ST or STS to set EERE bit triggers unexpected interrupt
SEI
After increasing the source clock frequency more than 2% with settings in the OSCCAL reg-
ister, the device may execute some of the subsequent instructions incorrectly.
Problem Fix / Workaround
The behavior follows errata number 3., and the same Fix / Workaround is applicable on this
errata.
The JTAG instruction IDCODE is not working correctly. Data to succeeding devices are
replaced by all-ones during Update-DR.
Problem Fix / Workaround
–
–
–
request.
Reading EEPROM by using the ST or STS command to set the EERE bit in the EECR reg-
ister triggers an unexpected EEPROM interrupt request.
Problem Fix / Workaround
Always use OUT or SBI to set EERE in EECR.
If ATmega128 is the only device in the scan chain, the problem is not visible.
Select the Device ID Register of the ATmega128 by issuing the IDCODE instruction
or by entering the Test-Logic-Reset state of the TAP controller to read out the
contents of its Device ID Register and possibly data from succeeding devices of the
scan chain. Issue the BYPASS instruction to the ATmega128 while reading the
Device ID Registers of preceding devices of the boundary scan chain.
If the Device IDs of all devices in the boundary scan chain must be captured
simultaneously, the ATmega128 must be the fist device in the chain.
; set global interrupt enable
2467V–AVR–02/11