ATMEGA128RFA1-ZU Atmel, ATMEGA128RFA1-ZU Datasheet - Page 97

IC AVR MCU 2.4GHZ XCEIVER 64QFN

ATMEGA128RFA1-ZU

Manufacturer Part Number
ATMEGA128RFA1-ZU
Description
IC AVR MCU 2.4GHZ XCEIVER 64QFN
Manufacturer
Atmel
Series
ATMEGAr

Specifications of ATMEGA128RFA1-ZU

Frequency
2.4GHz
Data Rate - Maximum
2Mbps
Modulation Or Protocol
802.15.4 Zigbee
Applications
General Purpose
Power - Output
3.5dBm
Sensitivity
-100dBm
Voltage - Supply
1.8 V ~ 3.6 V
Current - Receiving
12.5mA
Current - Transmitting
14.5mA
Data Interface
PCB, Surface Mount
Memory Size
128kB Flash, 4kB EEPROM, 16kB RAM
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN, Exposed Pad
Rf Ic Case Style
QFN
No. Of Pins
64
Supply Voltage Range
1.8V To 3.6V
Operating Temperature Range
-40°C To +85°C
Svhc
No SVHC (15-Dec-2010)
Rohs Compliant
Yes
Processor Series
ATMEGA128x
Core
AVR8
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
128 KB
Data Ram Size
16 KB
Interface Type
JTAG
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
38
Number Of Timers
6
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVR128RFA1-EK1
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Modes of
Operation
Normal Mode
Clear Timer on
Compare Match (CTC)
Mode
2467V–AVR–02/11
The mode of operation, i.e., the behavior of the Timer/Counter and the output compare pins, is
defined by the combination of the Waveform Generation mode (WGM01:0) and Compare Output
mode (COM01:0) bits. The Compare Output mode bits do not affect the counting sequence,
while the Waveform Generation mode bits do. The COM01:0 bits control whether the PWM out-
put generated should be inverted or not (inverted or non-inverted PWM). For non-PWM modes
the COM01:0 bits control whether the output should be set, cleared, or toggled at a compare
match
For detailed timing information refer to
The simplest mode of operation is the normal mode (WGM01:0 = 0). In this mode the counting
direction is always up (incrementing), and no counter clear is performed. The counter simply
overruns when it passes its maximum 8-bit value (TOP = 0xFF) and then restarts from the bot-
tom (0x00). In normal operation the Timer/Counter overflow flag (
timer clock cycle as the TCNT0 becomes zero. The
bit, except that it is only set, not cleared. However, combined with the timer overflow interrupt
that automatically clears the
are no special cases to consider in the normal mode, a new counter value can be written
anytime.
The output compare unit can be used to generate interrupts at some given time. Using the out-
put compare to generate waveforms in normal mode is not recommended, since this will occupy
too much of the CPU time.
In Clear Timer on Compare or CTC mode (WGM01:0 = 2), the OCR0 Register is used to manip-
ulate the counter resolution. In CTC mode the counter is cleared to zero when the counter value
(TCNT0) matches the OCR0. The OCR0 defines the top value for the counter, hence also its
resolution. This mode allows greater control of the compare match output frequency. It also sim-
plifies the operation of counting external events.
The timing diagram for the CTC mode is shown in
increases until a compare match occurs between TCNT0 and OCR0, and then counter (TCNT0)
is cleared.
Figure 38. CTC Mode, Timing Diagram
An interrupt can be generated each time the counter value reaches the TOP value by using the
OCF0 flag. If the interrupt is enabled, the interrupt handler routine can be used for updating the
TOP value. However, changing the TOP to a value close to BOTTOM when the counter is run-
ning with none or a low prescaler value must be done with care since the CTC mode does not
have the double buffering feature. If the new value written to OCR0 is lower than the current
TCNTn
OCn
(Toggle)
Period
(See “Compare Match Output Unit” on page
1
TOV0
flag, the timer resolution can be increased by software. There
2
“Timer/Counter Timing Diagrams” on page
3
96.).
TOV0
Figure
flag in this case behaves like a ninth
4
38. The counter value (TCNT0)
TOV0
OCn Interrupt Flag Set
) will be set in the same
ATmega128
(COMn1:0 = 1)
101.
97

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