IC RF TXRX SNGL-CHIP LP 20-QFN

CC2500-RTR1

Manufacturer Part NumberCC2500-RTR1
DescriptionIC RF TXRX SNGL-CHIP LP 20-QFN
ManufacturerTexas Instruments
CC2500-RTR1 datasheet
 


Specifications of CC2500-RTR1

Frequency2.4GHzData Rate - Maximum500kBaud
Modulation Or Protocol2-FSK, ASK, GFSK, MSK, OOKApplicationsISM, SRD
Power - Output-30dBm ~ 10dBmSensitivity-104dBm
Voltage - Supply1.8 V ~ 3.6 VCurrent - Receiving17mA
Current - Transmitting21.5mA @ 1 dBmData InterfacePCB, Surface Mount
Antenna ConnectorPCB, Surface MountOperating Temperature-40°C ~ 85°C
Package / Case20-VQFN Exposed Pad, 20-HVQFN, 20-SQFN, 20-DHVQFNOperating Temperature (min)-40C
Operating Temperature (max)85COperating Temperature ClassificationIndustrial
Product Depth (mm)4mmProduct Length (mm)4mm
Operating Supply Voltage (min)1.8VOperating Supply Voltage (typ)2.5/3.3V
Operating Supply Voltage (max)3.6VFor Use With296-24121 - DEV WRLSS TOOL FOR MSP430296-23125 - TARGET BRD WIRELESS EZ430-RF2500296-23031 - DEV WRLSS TOOL FOR MSP430/CC2500296-22903 - KIT EVAL MODULE FOR CC2500296-23077 - KIT DEV FOR CC2500/CC2550
Lead Free Status / RoHS StatusContains lead / RoHS non-compliantMemory Size-
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interference and time-varying signal strengths.
In order to increase the robustness to errors
spanning multiple bits, interleaving is used
when FEC is enabled. After de-interleaving, a
continuous span of errors in the received
stream will become single errors spread apart.
CC2500 employs matrix interleaving, which is
illustrated
in
Figure
14.
interleaving and de-interleaving buffers are 4 x
4 matrices. In the transmitter, the data bits
from the rate ½ convolutional coder are written
into the rows of the matrix, whereas the bit
sequence to be transmitted is read from the
columns of the matrix. Conversely, in the
receiver, the received symbols are written into
the rows of the matrix, whereas the data
passed onto the convolutional decoder is read
from the columns of the matrix.
Packet
FEC
Engine
Encoder
Demodulator
Figure 14: General Principle of Matrix Interleaving
When FEC and interleaving is used at least
one
extra
termination. In addition, the amount of data
transmitted over the air must be a multiple of
the size of the interleaver buffer (two bytes).
The
packet
automatically inserts one or two extra bytes at
the end of the packet, so that the total length
The
on-chip
of the data to be interleaved is an even
number. Note that these extra bytes are
invisible to the user, as they are removed
before the received packet enters the RX
FIFO.
When FEC and interleaving is used the
minimum data payload is 2 bytes.
Interleaver
Interleaver
Write buffer
Read buffer
Interleaver
Interleaver
Write buffer
Read buffer
SWRS040C
byte
is
required
for
control
hardware
therefore
Modulator
FEC
Packet
Decoder
Engine
Page 38 of 89
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