CYWUSB6935-48LFI Cypress Semiconductor Corp, CYWUSB6935-48LFI Datasheet - Page 17

• Manufacturer Part Number: CYWUSB6935-48LFI
• Description: IC USB WIRELESS 2.4GHZ 48VQFN
• Manufacturer: Cypress Semiconductor Corp

Specifications of CYWUSB6935-48LFI

• Frequency: 2.4GHz
• Data Rate - Maximum: 62.5kbps
• Modulation Or Protocol: DSSS, GFSK
• Applications: AMR, ISM, RKE
• Power - Output: 0dBm
• Sensitivity: -95dBm
• Voltage - Supply: 2.7 V ~ 3.6 V
• Current - Receiving: 57.7mA
• Current - Transmitting: 69.1mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-VQFN Exposed Pad, 48-HVQFN, 48-SQFN, 48-DHVQFN
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Memory Size: -
• Other names: 428-1578

Document 38-16008 Rev. **
Bit
7
6:0
Bit
7
6:0
Reserved
Reserved
Name
Reserved
Threshold Low
Name
Reserved
Threshold High
7
7
Addr: 0x1A
Addr: 0x19
6
Description
This bit is reserved and should be written with zero.
The Threshold Low value is used to determine the number of missed chips allowed when attempting to correlate
a single data bit of value ‘0’. A perfect reception of a data bit of ‘0’ with a 64 chips/bit PN code would result in zero
correlation matches, meaning the exact inverse of the PN code has been received. By setting the Threshold Low
value to 0x08 for example, up to eight chips can be erroneous while still identifying the value of the received data
bit. This value along with the Threshold High value determine the correlator count values for logic ‘1’ and logic ‘0’.
The threshold values used determine the sensitivity of the receiver to interference and the dependability of the
received data. By allowing a minimal number of erroneous chips the dependability of the received data increases
while the robustness to interference decreases. On the other hand increasing the maximum number of missed
chips means reduced data integrity but increased robustness to interference and increased range.
6
Description
This bit is reserved and should be written with zero.
The Threshold High value is used to determine the number of matched chips allowed when attempting to correlate
a single data bit of value ‘1’. A perfect reception of a data bit of ‘1’ with a 64 chips/bit or a 32 chips/bit PN code
would result in 64 chips/bit or 32 chips/bit correlation matches, respectively, meaning every bit was received
perfectly. By setting the Threshold High value to 0x38 (64-8) for example, up to eight chips can be erroneous
while still identifying the value of the received data bit. This value along with the Threshold Low value determine
the correlator count values for logic ‘1’ and logic ‘0’. The threshold values used determine the sensitivity of the
receiver to interference and the dependability of the received data. By allowing a minimal number of erroneous
chips the dependability of the received data increases while the robustness to interference decreases. On the
other hand increasing the maximum number of missed chips means reduced data integrity but increased
robustness to interference and increased range.
5
5
Figure 7-20. Threshold High
Figure 7-19. Threshold Low
PRELIMINARY
REG_THRESHOLD_H
REG_THRESHOLD_L
4
4
Threshold High
Threshold Low
3
3
2
2
1
1
CYWUSB6935
Default: 0x08
Default: 0x38
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