CYWUSB6935-48LFI Cypress Semiconductor Corp, CYWUSB6935-48LFI Datasheet - Page 19

• Manufacturer Part Number: CYWUSB6935-48LFI
• Description: IC USB WIRELESS 2.4GHZ 48VQFN
• Manufacturer: Cypress Semiconductor Corp

Specifications of CYWUSB6935-48LFI

• Frequency: 2.4GHz
• Data Rate - Maximum: 62.5kbps
• Modulation Or Protocol: DSSS, GFSK
• Applications: AMR, ISM, RKE
• Power - Output: 0dBm
• Sensitivity: -95dBm
• Voltage - Supply: 2.7 V ~ 3.6 V
• Current - Receiving: 57.7mA
• Current - Transmitting: 69.1mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-VQFN Exposed Pad, 48-HVQFN, 48-SQFN, 48-DHVQFN
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Memory Size: -
• Other names: 428-1578

Note:
Document 38-16008 Rev. **
Bit
7
6:0 Channel The Channel register (Reg 0x21) is used to determine the Synthesizer frequency when the A+N bit is set to 0. Use of other
Bit
7:6 Reserved
5
4:0 RSSI
Bit
7:3
2:0
6.
The RSSI will collect a single value each time the part is put into receive mode via Control register (Reg 0x03, bit 7=1).
Name
A+N
Name
Valid
Name
Reserved
PA Bias
A+N
7
7
7
Addr: 0x21
Addr: 0x22
Addr: 0x23
Reserved
Description
The A+N bit is used to specify whether the Synthesizer frequency is generated through the use of the Channel register (Reg
0x21) or through the use of the Synthesizer A Counter register (Reg 0x01) and the Synthesizer N Counter register (Reg
0x02).
When set to 1 the channel value is ignored and the values written in the Synthesizer A Counter register (Reg 0x01) and the
Synthesizer N Counter register (Reg 0x02) are used. When set to 0 the values written to the Synthesizer A Counter register
(Reg 0x01) and the Synthesizer N Counter register (Reg 0x02) are ignored and the channel value is used by the synthesizer.
It is recommended that the Channel register (Reg 0x21) is used as opposed to the Synthesizer A Counter register (Reg
0x01) and the Synthesizer N Counter register (Reg 0x02) method.
channels may be restricted by certain regulatory agencies. A value of 1 corresponds to a communication frequency of 2.402
GHz, while a value of 79 corresponds to a frequency of 2.479GHz. The channels are separated from each other by 1 MHz
intervals.
1 = Synthesizer A Counter register (Reg 0x01) and the Synthesizer N Counter register (Reg 0x02) registers used to generate
0 = Channel register (Reg 0x21) is used to generate Synthesizer frequency.
Synthesizer frequency.
Description
These bits are reserved. This register is read-only.
The Valid bit indicates whether the RSSI value in bits [4:0] are valid. This register is Read Only.
The Receive Strength Signal Indicator (RSSI) value indicates the strength of the received signal. This is a read only
value with the higher values indicating stronger received signals meaning more reliable transmissions.
Description
These bits are reserved and should be written with zeros.
The Power Amplifier Bias (PA Bias) bits are used to set the transmit power of the IC through increasing (values up to 7)
or decreasing (values down to 0) the gain of the on-chip Power Amplifier. The higher the register value the higher the
transmit power. By changing the PA Bias value signal strength management functions can be accomplished. For general
purpose communication a value of 7 is recommended.
1 = RSSI value is valid
0 = RSSI value is invalid
6
6
6
Figure 7-25. Receive Signal Strength Indicator (RSSI)
Reserved
Valid
5
5
5
Figure 7-26. Power Control
PRELIMINARY
Figure 7-24. Channel
REG_CHANNEL
4
4
4
REG_RSSI
REG_PA
Channel
3
3
3
RSSI
2
2
2
[6]
PA Bias
1
1
1
CYWUSB6935
Default: 0x00
Default: 0x00
Default: 0x00
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