CYWUSB6932-28SEC Cypress Semiconductor Corp, CYWUSB6932-28SEC Datasheet - Page 10

IC WIRELESS USB 2.4GHZ 28-SOIC

CYWUSB6932-28SEC

Manufacturer Part Number
CYWUSB6932-28SEC
Description
IC WIRELESS USB 2.4GHZ 28-SOIC
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CYWUSB6932-28SEC

Frequency
2.4GHz
Data Rate - Maximum
62.5kbps
Modulation Or Protocol
DSSS, GFSK
Applications
HID, PC, Peripheral Gaming Devices
Power - Output
0dBm
Sensitivity
-90dBm
Voltage - Supply
2.7 V ~ 3.6 V
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Operating Temperature
0°C ~ 70°C
Package / Case
28-SOIC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Memory Size
-
Current - Transmitting
-
Current - Receiving
-
Other names
428-1579-5

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Document 38-16007 Rev. *G
Bit
7:4
3
2:0
Name
Reserved
SERDES Enable The SERDES Enable bit is used to switch between bit-serial mode and SERDES mode.
EOF Length
7
Addr: 0x06
6
Description
These bits are reserved and should be written with zeroes.
When the SERDES is enabled data can be written to and read from the IC one byte at a time, through the use of the
SERDES Data registers. The bit-serial mode requires bits to be written one bit at a time through the use of the
DIO/DIOVAL pins, refer to section 3.2. It is recommended that SERDES mode be used to avoid the need to manage
the timing required by the bit-serial mode.
The End of Frame Length bits are used to set the number of sequential bit times for an inter-frame gap without valid
data before an EOF event will be generated. When in receive mode and a valid bit has been received the EOF event
can then be identified by the number of bit times that expire without correlating any new data. The EOF event causes
data to be moved to the proper SERDES Data Register and can also be used to generate interrupts. If 0 is the EOF
length, an EOF condition will occur at the first invalid bit after a valid reception.
1 = SERDES enabled.
0 = SERDES disabled, bit-serial mode enabled.
Reserved
5
Figure 7-5. SERDES Control
REG_SERDES_CTL
4
SERDES
Enable
3
2
EOF Length
1
CYWUSB6932
CYWUSB6934
Default: 0x03
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