ATA8404-6DQY Atmel, ATA8404-6DQY Datasheet - Page 4

IC TRANSMITTR ASK/FSK UHF 10TSSO

ATA8404-6DQY

Manufacturer Part Number
ATA8404-6DQY
Description
IC TRANSMITTR ASK/FSK UHF 10TSSO
Manufacturer
Atmel
Datasheet

Specifications of ATA8404-6DQY

Frequency
313MHz ~ 317MHz
Applications
Home Automation, Remote Sensing, RKE
Modulation Or Protocol
ASK, FSK
Data Rate - Maximum
40 kBaud
Power - Output
4dBm ~ 8dBm
Current - Transmitting
8.4mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Voltage - Supply
2 V ~ 3.6 V
Operating Temperature
-55°C ~ 85°C
Package / Case
10-TSSOP
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Operating Supply Voltage (typ)
2.5/3.3V
Operating Supply Voltage (max)
3.6V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Memory Size
-
Lead Free Status / Rohs Status
Compliant
3. General Description
4
ATA8404/ATA8405 [Preliminary]
Figure 2-2.
This fully integrated PLL transmitter allows the design of simple, low-cost RF miniature trans-
mitters for remote control and other industrial applications. The VCO is locked to
24
for a 315 MHz/433.92 MHz transmitter. All other PLL and VCO peripheral elements are
integrated.
The XTO is a series resonance (current mode) oscillator. Only one capacitor and a crystal
connected in series to GND are needed as external elements in an ASK system. The internal
FSK switch, together with a second capacitor, can be used for FSK modulation. The crystal
oscillator needs typically 0.6 ms until the CLK output is activated if a crystal as defined in the
electrical characteristics is used (e.g., TPM crystal). For most crystals used in RKE systems, a
shorter time will result.
The CLK output is switched on if the amplitude of the current flowing through the crystal has
reached 35% to 80% of its final value. This is synchronized with the 1.64/1.69 MHz CLK out-
put. As a result, the first period of the CLK output is always a full period. The PLL is then
locked < 250 µs after CLK output activation. This means an additional wait time of
necessary before the PA can be switched on and the data transmission can start. This results
in a significantly lower time of about 0.85 ms between enabling the ATA8404/ATA8405 and the
beginning of the data transmission which saves battery power.
f
XTAL
/32
Block Diagram
ANT2
ANT1
FSK
f
ASK
CLK
XTAL
2
1
3
4
5
for ATA8404/ATA8405. Thus, a 13.125 MHz/13.56 MHz crystal is needed
ATA8405
OR
f
8
PA
EN
EN
PLL
VCO
f
Power up/down
PFD
CP
LF
24/
32
XTO
Ampl. OK
10
ENABLE
GND
9
VS
8
7
6
XTO1
XTO2
9136C–INDCO–10/09
250 µs is

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