ATA8742-PXQW Atmel, ATA8742-PXQW Datasheet - Page 160

MCU W/TRANSMITTER ASK/FSK 24QFN

ATA8742-PXQW

Manufacturer Part Number
ATA8742-PXQW
Description
MCU W/TRANSMITTER ASK/FSK 24QFN
Manufacturer
Atmel
Datasheet

Specifications of ATA8742-PXQW

Frequency
433MHz
Applications
Home Automation, Remote Sensing, RKE
Modulation Or Protocol
ASK, FSK
Data Rate - Maximum
32 kBit/s
Power - Output
7.5dBm
Current - Transmitting
9.8mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Memory Size
4kB Flash, 256B EEPROM, 256B SRAM
Voltage - Supply
2 V ~ 4 V
Operating Temperature
-40°C ~ 85°C
Package / Case
24-VQFN Exposed Pad, 24-HVQFN, 24-SQFN, 24-DHVQFN
Processor Series
ATA8x
Core
AVR8
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
4 KB
Data Ram Size
256 B
Interface Type
SPI, USI
Maximum Clock Frequency
8.1 MHz
Number Of Programmable I/os
12
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ATASTK512-EK1-IND
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
 Details

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
ATA8742-PXQW
Manufacturer:
ATMEL
Quantity:
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25.6
25.6.1
25.6.2
160
Changing Channel or Reference Selection
ATA8742
ADC Input Channels
ADC Voltage Reference
The MUX5:0 and REFS1:0 bits in the ADMUX Register are single buffered through a temporary
register to which the CPU has random access. This ensures that the channels and reference
selection only takes place at a safe point during the conversion. The channel and reference
selection is continuously updated until a conversion is started. Once the conversion starts, the
channel and reference selection is locked to ensure a sufficient sampling time for the ADC. Con-
tinuous updating resumes in the last ADC clock cycle before the conversion completes (ADIF in
ADCSRA is set). Note that the conversion starts on the following rising ADC clock edge after
ADSC is written. The user is thus advised not to write new channel or reference selection values
to ADMUX until one ADC clock cycle after ADSC is written.
If Auto Triggering is used, the exact time of the triggering event can be indeterministic. Special
care must be taken when updating the ADMUX Register, in order to control which conversion
will be affected by the new settings.
If both ADATE and ADEN is written to one, an interrupt event can occur at any time. If the
ADMUX Register is changed in this period, the user cannot tell if the next conversion is based
on the old or the new settings. ADMUX can be safely updated in the following ways:
When updating ADMUX in one of these conditions, the new settings will affect the next ADC
conversion.
When changing channel selections, the user should observe the following guidelines to ensure
that the correct channel is selected:
In Single Conversion mode, always select the channel before starting the conversion. The chan-
nel selection may be changed one ADC clock cycle after writing one to ADSC. However, the
simplest method is to wait for the conversion to complete before changing the channel selection.
In Free Running mode, always select the channel before starting the first conversion. The chan-
nel selection may be changed one ADC clock cycle after writing one to ADSC. However, the
simplest method is to wait for the first conversion to complete, and then change the channel
selection. Since the next conversion has already started automatically, the next result will reflect
the previous channel selection. Subsequent conversions will reflect the new channel selection.
The reference voltage for the ADC (V
ended channels that exceed V
either V
after switching reference voltage source may be inaccurate, and the user is advised to discard
this result.
a. When ADATE or ADEN is cleared.
b. During conversion, minimum one ADC clock cycle after the trigger event.
c. After a conversion, before the Interrupt Flag used as trigger source is cleared.
CC
, or internal 1.1V reference, or external AREF pin. The first ADC conversion result
REF
will result in codes close to 0x3FF. V
REF
) indicates the conversion range for the ADC. Single
REF
can be selected as
9151A–INDCO–07/09

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