ATA8742-PXQW Atmel, ATA8742-PXQW Datasheet - Page 89

• Manufacturer Part Number: ATA8742-PXQW
• Description: MCU W/TRANSMITTER ASK/FSK 24QFN
• Manufacturer: Atmel

Specifications of ATA8742-PXQW

• Frequency: 433MHz
• Applications: Home Automation, Remote Sensing, RKE
• Modulation Or Protocol: ASK, FSK
• Data Rate - Maximum: 32 kBit/s
• Power - Output: 7.5dBm
• Current - Transmitting: 9.8mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Memory Size: 4kB Flash, 256B EEPROM, 256B SRAM
• Voltage - Supply: 2 V ~ 4 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 24-VQFN Exposed Pad, 24-HVQFN, 24-SQFN, 24-DHVQFN
• Processor Series: ATA8x
• Core: AVR8
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 4 KB
• Data Ram Size: 256 B
• Interface Type: SPI, USI
• Maximum Clock Frequency: 8.1 MHz
• Number Of Programmable I/os: 12
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ATASTK512-EK1-IND
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Details

20. 8-bit Timer/Counter0 with PWM
20.1
20.2
20.2.1
9151A–INDCO–07/09
Features
Overview
Registers
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Timer/Counter0 is a general purpose 8-bit Timer/Counter module, with two independent Output
Compare Units, and with PWM support. It allows accurate program execution timing (event man-
agement) and wave generation.
A simplified block diagram of the 8-bit Timer/Counter is shown in
the actual placement of I/O pins. CPU accessible I/O Registers, including I/O bits and I/O pins,
are shown in bold. The device-specific I/O Register and bit locations are listed in the
Description” on page
Figure 20-1. 8-bit Timer/Counter Block Diagram
The Timer/Counter (TCNT0) and Output Compare Registers (OCR0A and OCR0B) are 8-bit
registers. Interrupt request (abbreviated to Int.Req. in the figure) signals are all visible in the
Timer Interrupt Flag Register (TIFR0). All interrupts are individually masked with the Timer Inter-
rupt Mask Register (TIMSK0). TIFR0 and TIMSK0 are not shown in the figure.
The Timer/Counter can be clocked internally, via the prescaler, or by an external clock source on
the T0 pin. The Clock Select logic block controls which clock source and edge the Timer/Counter
Two Independent Output Compare Units
Double Buffered Output Compare Registers
Clear Timer on Compare Match (Auto Reload)
Glitch Free, Phase Correct Pulse Width Modulator (PWM)
Variable PWM Period
Frequency Generator
Three Independent Interrupt Sources (TOV0, OCF0A, and OCF0B)
100.
Timer/Counter
TCCRnA
OCRnA
TCNTn
OCRnB
=
=
Direction
Count
Clear
Control Logic
TOP
=
TCCRnB
Value
BOTTOM
Fixed
TOP
clk
=
Tn
0
OCnA
(Int.Req.)
OCnB
(Int.Req.)
TOVn
(Int.Req.)
Clock Select
Generation
Generation
Waveform
Waveform
( From Prescaler )
Detector
Edge
Figure 20-1 on page
OCnA
OCnB
Tn
ATA8742
“Register
89. For
89