RFPIC12F675F-I/SS Microchip Technology, RFPIC12F675F-I/SS Datasheet - Page 50

• Manufacturer Part Number: RFPIC12F675F-I/SS
• Description: IC MCU 1KX14 RF FSK/ASK 20SSOP
• Manufacturer: Microchip Technology
• Series: PIC®r

Specifications of RFPIC12F675F-I/SS

• Package / Case: 20-SSOP
• Frequency: 380MHz ~ 450MHz
• Applications: RKE, Security Systems
• Modulation Or Protocol: ASK, FSK
• Data Rate - Maximum: 40 kbps
• Power - Output: 10dBm
• Current - Transmitting: 14mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Memory Size: 1024 x 14 words Flash, 128 x 8 Byte EEPROM, 64 x 8 Byte SRAM
• Voltage - Supply: 2V ~ 5.5V
• Operating Temperature: -40°C ~ 125°C
• Processor Series: RFPIC12F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 64 B
• Interface Type: USB
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 6
• Number Of Timers: 2
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ICE2000, DV164102, AC164101, AC164103
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 4-ch x 10-bit
• Program Memory Type: Flash
• Program Memory Size: 1.75 KB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT20SS-1 - SOCKET TRANSITION 18DIP 20SSOPAC164103 - MODULE RCVR RFPIC 433MHZAC164101 - MODULE TRANSMITTER RFPIC 433MHZDV164102 - KIT DEV RFPICKIT KIT 1AC124002 - MOD SKT PROMATEII 18SOIC/20SSOP
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: Q3188156

rfPIC12F675
8.7
Data memory can be code protected by programming
the CPD bit to ‘0’.
When the data memory is code protected, the CPU is
able to read and write data to the Data EEPROM. It is
recommended to code protect the program memory
when code protecting data memory. This prevents
anyone from programming zeroes over the existing
code (which will execute as NOPs) to reach an added
routine, programmed in unused program memory,
which
Programming unused locations to ‘0’ will also help
prevent data memory code protection from becoming
breached.
TABLE 8-1:
DS70091A-page 48
0Ch
9Ah
9Bh
9Ch
9Dh
Legend: x = unknown, u = unchanged, - = unimplemented read as '0', q = value depends upon condition.
Note 1: EECON2 is not a physical register.
Address
outputs
DATA EEPROM OPERATION
DURING CODE PROTECT
Shaded cells are not used by Data EEPROM module.
PIR1
EEDATA
EEADR
EECON1
EECON2
Name
the
REGISTERS/BITS ASSOCIATED WITH DATA EEPROM
(1)
contents
EEPROM Data Register
EEPROM Control Register 2
Bit 7
EEIF
—
—
EEPROM Address Register
ADIF
of
Bit 6
—
data
Bit 5
—
—
memory.
Preliminary
Bit 4
—
—
WRERR WREN
CMIF
Bit 3
Bit 2
—
Bit 1
WR
—
TMR1IF 00-- 0--0 00-- 0--0
Bit 0
 2003 Microchip Technology Inc.
RD
0000 0000 0000 0000
-000 0000 -000 0000
---- x000 ---- q000
---- ---- ---- ----
POR, BOD
Value on
Value on all
RESETS
other