PN5120A0HN1/C1,157 NXP Semiconductors, PN5120A0HN1/C1,157 Datasheet

IC TRANSMISSION MOD 32-HVQFN

PN5120A0HN1/C1,157

Manufacturer Part Number
PN5120A0HN1/C1,157
Description
IC TRANSMISSION MOD 32-HVQFN
Manufacturer
NXP Semiconductors
Datasheet

Specifications of PN5120A0HN1/C1,157

Rf Type
Read / Write
Frequency
13.56MHz
Features
ISO14443A, ISO1443B
Package / Case
32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
935280537157
PN5120A0HN1/C1
PN5120A0HN1/C1
1. Introduction
2. General description
This Product short data sheet describes the functionality of the transceiver IC PN512. It
includes functional and electrical specifications. A complete specification is given in the
product data sheet.
The PN512 is a highly integrated transceiver IC for contactless communication at
13.56 MHz. This transceiver IC utilizes an outstanding modulation and demodulation
concept completely integrated for different kinds of contactless communication methods
and protocols at 13.56 MHz.
The PN512 transceiver ICs support 4 different operating modes
Enabled in Reader/Writer mode for ISO 14443A/Mifare, the PN512’s internal transmitter
part is able to drive a reader / writer antenna designed to communicate with ISO 14443A/
Mifare cards and transponders without additional active circuitry. The receiver part
provides a robust and efficient implementation of a demodulation and decoding circuitry
for signals from ISO 14443A/Mifare compatible cards and transponders. The digital part
handles the complete ISO 14443A framing and error detection (Parity & CRC).
The PN512 supports Mifare Classic (e.g. Mifare Standard) products. The PN512 supports
contactless communication using Mifare higher transfer speeds up to 424 kbit/s in both
directions.
Enabled in Reader/Writer mode for FeliCa, the PN512 transceiver IC supports the FeliCa
communication scheme. The receiver part provides a robust and efficient implementation
of the demodulation and decoding circuitry for FeliCa coded signals. The digital part
handles the FeliCa framing and error detection like CRC. The PN512 supports contactless
communication using FeliCa Higher transfer speeds up to 424 kbit/s in both directions.
The PN512 supports all layers of the ISO/IEC 14443B reader/writer communication
scheme, given correct implementation of additional components, like oscillator, power
supply, coil etc. and provided that standardised protocols, e.g. like ISO/IEC 14443-4
and/or ISO/IEC 14443B anticollision are correctly implemented.
PN512
Transmission Module
Rev. 3.3 — 13 June 2007
124533
Reader/Writer mode supporting ISO 14443A/Mifare and FeliCa scheme
Reader/Writer mode supporting ISO 14443B scheme
Card Operation mode supporting ISO 14443A/Mifare and FeliCa scheme
NFCIP-1 mode
Product short data sheet

Related parts for PN5120A0HN1/C1,157

PN5120A0HN1/C1,157 Summary of contents

Page 1

PN512 Transmission Module Rev. 3.3 — 13 June 2007 124533 1. Introduction This Product short data sheet describes the functionality of the transceiver IC PN512. It includes functional and electrical specifications. A complete specification is given in the product data ...

Page 2

... NXP Semiconductors In Card Operation mode, the PN512 transceiver IC is able to answer to a reader/writer command either according to the FeliCa or ISO 14443A/Mifare card interface scheme. The PN512 generates the digital load modulated signals and in addition with an external circuit the answer can be sent back to the reader/writer. A complete card functionality is ...

Page 3

... NXP Semiconductors 3. Features Highly integrated analog circuitry to demodulate and decode responses Buffered output drivers to connect an antenna with minimum number of external components Integrated RF Level detector Integrated data mode detector ISO 14443A/Mifare support ISO 14443B reader/writer support Typical operating distance in Reader/Writer mode for communication to a ISO 14443A/ ...

Page 4

... NXP Semiconductors 4. Quick reference data Table 1. Quick reference data Symbol Parameter AV Supply Voltage Pad power supply DD SV S2C Pad Power Supply DD I Hard Power-down Current HPD I Soft Power-down Current SPD I Digital Supply Current DVDD I Analog Supply Current AVDD I Analog Supply Current, ...

Page 5

... NXP Semiconductors 6. Block diagram The Analog interface handles the modulation and demodulation of the analog signals according to the Card Receiving mode, Reader/Writer mode and NFCIP-1 mode communication scheme. The RF level detector detects the presence of an external RF-field delivered by the antenna to the RX pin. ...

Page 6

... NXP Semiconductors NWR NRD NCS FIFO Control 64 Byte FIFO Control Register Bank MIFARE Classic Unit Random Number Generator Amplitude Rating Reference Voltage Analog Test MUX and DAC VMID AUX1,2 Fig 1. PN512 Block diagram 124533 Product short data sheet ALE PVDD 8 bit Parallel, SPI, UART, I2C Interface Control (incl. Automatic Interface Detection & ...

Page 7

... NXP Semiconductors 7. Pinning information 7.1 Pinning Fig 2. Pinning configuration HVQFN32 (SOT617-1) Fig 3. Pinning configuration HVQFN40 (SOT618) 124533 Product short data sheet terminal 1 index area A1 1 PVDD 2 DVDD 3 DVSS 4 PN512 5 PVSS 6 NRSTPD SIGIN 7 SIGOUT 8 Transparent top view terminal 1 index area PVDD 5 PN512 ...

Page 8

... NXP Semiconductors 7.2 Pin description Table 3. Pin description HVQFN32 Symbol Pin Type PVDD 2 PWR DVDD 3 PWR DVSS 4 PWR PVSS 5 PWR NRSTPD 6 I SIGIN 7 I SIGOUT 8 O SVDD 9 PWR TVSS 10 PWR TX1 11 O TVDD 12 PWR TX2 13 O TVSS 14 PWR AVDD 15 PWR VMID ...

Page 9

... NXP Semiconductors Table 4. Pin description HVQFN40 Symbol Pin Type PVDD 5 PWR DVDD 6 PWR DVSS 7 PWR PVSS 8 PWR NRSTPD 9 I SIGIN 10 I SIGOUT 11 O SVDD 12 PWR TVSS 13 PWR TX1 14 O TVDD 15 PWR TX2 16 O TVSS 17 PWR AVDD 18 PWR VMID 19 PWR AVSS 21 PWR ...

Page 10

... NXP Semiconductors 8. Operating modes PN512 transceiver IC supports the following operating modes: • Reader/Writer mode supporting ISO 14443A/Mifare, ISO 14443B & FeliCa scheme • Card Operation mode supporting ISO 14443A/ Mifare and FeliCa scheme • NFCIP-1 mode The modes support different transfer speeds and modulation schemes. The following chapters will explain the different modes in detail ...

Page 11

... NXP Semiconductors Table 5. Communication direction PN512 → PICC (send data from the PN512 to a card) PICC → PN512 (receive data from a card) The contactless UART of PN512 and a dedicated external host controller are required to handle the complete Mifare/ISO 14443A/Mifare protocol. 8.1.1.1 Data Coding and framing according to ISO 14443A/Mifare ...

Page 12

... NXP Semiconductors 8.1.2 FeliCa reader/writer functionality The FeliCa mode is the general reader/writer to card communication scheme according to the FeliCa specification. The following diagram describes the communication on a physical level, the communication overview describes the physical parameters. FeliCa Reader PN512 Fig 7. FeliCa reader/writer Communication Diagram Table 6 ...

Page 13

... The following registers and bits cover the ISO 14443B communication scheme reference documentation the international standard ISO 14443 'Identification cards- Contactless integrated circuit(s) cards- Proximity cards, part 1-4' can be taken. Note: NXP Semiconductors does not offer a software library to design in the ISO 14443B protocol. 8.2 NFCIP-1 mode The NFCIP-1 communication differentiates between an active and a Passive Communication mode ...

Page 14

... NXP Semiconductors 8.2.1 Active Communication mode Active Communication mode means both the initiator and the target are using their own RF field to transmit data. Host NFC Initiator powered to generate RF field Host NFC Initiator powered for digital processing Fig 9. Active Communication mode Table 9. ...

Page 15

... NXP Semiconductors 8.2.2 Passive Communication mode Passive Communication mode means that the target answers to an initiator command in a load modulation scheme. The initiator is active meaning generating the RF field. Fig 10. Passive Communication mode Table 10. Communication direction Initiator → Target According to Target → Initiator According to The contactless UART of PN512 and a dedicated host controller are required to handle the NFCIP-1 protocol ...

Page 16

... NXP Semiconductors 8.2.3 NFCIP-1 framing and coding The NFCIP-1 framing and coding in Active and Passive Communication mode is defined in the NFCIP-1 standard. Table 11. Transfer speed 106 kbit/s 212 kbit/s 424 kbit/s 8.2.4 NFCIP-1 Protocol Support The NFCIP-1 protocol is not completely described in this document. For detailed explanation of the protocol refer to the NFCIP-1 standard ...

Page 17

... NXP Semiconductors 8.3.1 Mifare Card Operation mode Table 12. Communication direction reader / writer → PN512 PN512 → reader/ writer 8.3.2 FeliCa Card Operation mode Table 13. Communication direction reader/writer → PN512 PN512 → reader/ writer 124533 Product short data sheet Mifare Card Operation mode ...

Page 18

... NXP Semiconductors 9. Application design-in information The figure below shows a typical circuit diagram, using a complementary antenna connection to the PN512. The antenna tuning and RF part matching is described in the application note PN512 transceiver IC; Antenna and RF Design Guide. DVDD PVDD SVDD PVSS NRSTPD Host Interface ...

Page 19

... NXP Semiconductors 10. Limiting values Table 14. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter PV Supply voltage DD P Total power dissipation per package (V tot and DV in short cut mode Junction temperature range J ESDH ESD Susceptibility (Human Body model) ...

Page 20

... October 2006 • Modifications: The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • Legal texts have been adapted to the new company name where appropriate. • Section 7.2 “Pin description” on page - corrected in - corrected in • ...

Page 21

... Licensing, the pool agent of the NFC Patent Pool, e-mail: info@vialicensing.com Purchase of an NXP Semiconductors IC that complies with one of the NFC Standards (ISO/IEC18.092; ISO/IEC21.481) does not convey an implied license under any patent right on that standards. The use of this NXP IC according to ISO/IEC 14443B might infringe third party patent rights ...

Page 22

... NXP Semiconductors 16. Tables Table 1. Quick reference data . . . . . . . . . . . . . . . . . . . . .4 Table 2. Ordering information . . . . . . . . . . . . . . . . . . . . .4 Table 3. Pin description HVQFN32 . . . . . . . . . . . . . . . . .8 Table 4. Pin description HVQFN40 . . . . . . . . . . . . . . . . .9 Table 5. Communication overview for ISO 14443A/Mifare reader/writer . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Table 6. Communication overview for FeliCa reader/writer . . . . . . . . . . . . . . . . . . . . . . . . . . .12 Table 7. FeliCa framing and coding . . . . . . . . . . . . . . . .12 Table 8. Start Value for the CRC Polynomial: (00h), (00h) ...

Page 23

... NXP Semiconductors 18. Contents 1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 2 General description . . . . . . . . . . . . . . . . . . . . . . 1 3 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 4 Quick reference data . . . . . . . . . . . . . . . . . . . . . 4 5 Ordering information . . . . . . . . . . . . . . . . . . . . . 4 6 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 5 7 Pinning information . . . . . . . . . . . . . . . . . . . . . . 7 7.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 7.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 8 8 Operating modes . . . . . . . . . . . . . . . . . . . . . . . 10 8.1 Reader/Writer mode . . . . . . . . . . . . . . . . . . . . 10 8.1.1 ISO 14443A/Mifare reader/writer functionality 10 8.1.1.1 Data Coding and framing according to ISO 14443A/Mifare ...

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