MC74HC368ADTG ON Semiconductor, MC74HC368ADTG Datasheet

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MC74HC368ADTG

Manufacturer Part Number
MC74HC368ADTG
Description
IC BUFF/DVR TRI-ST HEX TSSOP 16
Manufacturer
ON Semiconductor
Series
74HCr
Datasheet

Specifications of MC74HC368ADTG

Logic Type
Inverter
Number Of Inputs
4, 2
Number Of Circuits
6
Current - Output High, Low
7.8mA, 7.8mA
Voltage - Supply
2 V ~ 6 V
Operating Temperature
-55°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
16-TSSOP (0.173", 4.40mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
MC74HC368A
Hex 3-State Inverting
Buffer with Separate 2-Bit
and 4-Bit Sections
High−Performance Silicon−Gate CMOS
inputs are compatible with standard CMOS outputs; with pullup
resistors, they are compatible with LSTTL outputs.
own active−low Output Enable. When either of the enables is high, the
affected buffer outputs are placed into high−impedance states. The
HC368A has inverting outputs.
Features
© Semiconductor Components Industries, LLC, 2010
January, 2010 − Rev. 1
The MC74HC368A is identical in pinout to the LS368. The device
This device is arranged into 2−bit and 4−bit sections, each having its
Output Drive Capability: 15 LSTTL Loads
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 2 to 6 V
Low Input Current: 1 mA
High Noise Immunity Characteristic of CMOS Devices
These are Pb−Free Devices
OUTPUT ENABLE 1
OUTPUT ENABLE 2
Figure 1. Logic Diagram
15
1
A0
A1
A2
A3
A4
A5
10
12
14
2
4
6
PIN 16 = V
PIN 8 = GND
13
11
3
5
7
9
Y0
Y1
Y2
Y3
Y4
Y5
CC
1
16
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
16
(Note: Microdot may be in either location)
ENABLE 1
1
OUTPUT
A
WL, L
YY, Y
WW, W
G or G
ORDERING INFORMATION
X = don’t care
Z = high−impedance
Enable 1,
Enable 2
1
GND
A0
Y0
A1
Y1
A2
Y2
PIN ASSIGNMENT
FUNCTION TABLE
http://onsemi.com
H
L
L
Inputs
1
2
3
4
5
6
7
8
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
CASE 751B
D SUFFIX
SOIC−16
CASE 948F
DT SUFFIX
TSSOP−16
Publication Order Number:
A
H
X
L
16
15
14
13
12
11
10
9
Output
16
1
V
OUTPUT
ENABLE 2
A5
Y5
A4
Y4
A3
Y3
H
MC74HC368A/D
Y
L
Z
CC
DIAGRAMS
16
1
MARKING
HC368AG
AWLYWW
ALYWG
368A
HC
G

Related parts for MC74HC368ADTG

MC74HC368ADTG Summary of contents

Page 1

MC74HC368A Hex 3-State Inverting Buffer with Separate 2-Bit and 4-Bit Sections High−Performance Silicon−Gate CMOS The MC74HC368A is identical in pinout to the LS368. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL ...

Page 2

MAXIMUM RATINGS Symbol Parameter V DC Supply Voltage (Referenced to GND Input Voltage (Referenced to GND Output Voltage (Referenced to GND) out I DC Input Current, per Pin Output Current, per ...

Page 3

DC ELECTRICAL CHARACTERISTICS Symbol Parameter V Minimum High−Level Input IH Voltage V Maximum Low−Level Input IL Voltage V Minimum High−Level Output OH Voltage V Maximum Low−Level Output OL Voltage I Maximum Input Leakage Current in I Maximum Three−State OZ Leakage ...

Page 4

INPUT A 50% 10% t PHL 90% 50% OUTPUT Y 10% t THL Figure 2. TEST POINT OUTPUT DEVICE UNDER TEST *Includes all probe and jig capacitance Figure 4. A OUTPUT ENABLE SWITCHING WAVEFORMS ...

Page 5

ORDERING INFORMATION Device MC74HC368ADG MC74HC368ADR2G MC74HC368ADTR2G †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *This package is inherently Pb−Free. Package SOIC−16 (Pb−Free) SOIC−16 (Pb−Free) ...

Page 6

... G K −T− SEATING PLANE 0.25 (0.010 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. PACKAGE DIMENSIONS SOIC−16 CASE 751B−05 ISSUE K −B− 0.25 (0.010 SOLDERING FOOTPRINT ...

Page 7

... −V− C 0.10 (0.004) −T− SEATING D PLANE 16X 0.36 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. PACKAGE DIMENSIONS TSSOP−16 DT SUFFIX CASE 948F−01 ISSUE Ç ...

Page 8

... Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303− ...

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