MCF51JE256CLL Freescale Semiconductor, MCF51JE256CLL Datasheet

IC MCU 32BIT 256K FLASH 100LQFP

MCF51JE256CLL

Manufacturer Part Number
MCF51JE256CLL
Description
IC MCU 32BIT 256K FLASH 100LQFP
Manufacturer
Freescale Semiconductor
Series
MCF51JEr
Datasheet

Specifications of MCF51JE256CLL

Core Processor
Coldfire V1
Core Size
32-Bit
Speed
50MHz
Connectivity
CAN, EBI/EMI, I²C, SCI, SPI, USB OTG
Peripherals
LVD, PWM, WDT
Number Of I /o
65
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 12x12b, D/A 1x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Processor Series
MCF51JE
Core
ColdFire V1
Mounting Style
SMD/SMT
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
DEMOEM
Package
100LQFP
Device Core
ColdFire
Family Name
MCF51JE
Maximum Speed
50.33 MHz
Operating Supply Voltage
2.5|3.3 V
Data Bus Width
32 Bit
Number Of Programmable I/os
65
Interface Type
I2C/SCI/SPI
On-chip Adc
8-chx12-bit
On-chip Dac
1-chx12-bit
Number Of Timers
1
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCF51JE256CLL
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
An Energy-Efficient Solution from Freescale
MCF51JE256/128
The MCF51JE256 series devices are members of the low-cost,
low-power, high-performance ColdFire
microcontrollers (MCUs).
Not all features are available in all devices or packages; see
Table 2
Freescale Semiconductor
Data Sheet: Advanced Information
32-Bit ColdFire V1 Central Processor Unit (CPU)
• Up to 50.33-MHz ColdFire CPU above 2.4 V and 40 MHz CPU above
• ColdFire Instruction Set Revision C (ISA_C).
• 32-bit multiply and accumulate (MAC) supports signed or unsigned integer
On-Chip Memory
• 256 K Flash comprised of two independent 128 K flash arrays;
• 32 Kbytes System Random-access memory (RAM).
• Security circuitry to prevent unauthorized access to RAM and Flash
Power-Saving Modes
• Two ultra-low power stop modes. Peripheral clock enable register can
• Time of Day (TOD) — Ultra low-power 1/4 sec counter with up to 64s
• Ultra-low power external oscillator that can be used in stop modes to
Clock Source Options
• Oscillator (XOSC1) — Loop-control Pierce oscillator; 32.768 kHz crystal or
• Oscillator (XOSC2) for high frequency crystal input for MCG reference to
• Multipurpose Clock Generator (MCG) — PLL and FLL; precision trimming
System Protection
• Watchdog computer operating properly (COP) reset with option to run from
• Low-voltage detection with reset or interrupt; selectable trip points;
• Illegal opcode and illegal address detection with reset.
• Flash block protection for each array to prevent accidental write/erasure.
• Hardware CRC to support fast cyclic redundancy checks.
Development Support
• Integrated ColdFire DEBUG_Rev_B+ interface with single wire BDM
• Real-time debug with 6 hardware breakpoints (4 PC, 1 address and 1
• On-chip trace buffer provides programmable start/stop recording
Peripherals
• USB — Dual-role USB On-The-Go (OTG) device, supports USB in either
© Freescale Semiconductor, Inc., 2009-2010. All rights reserved.
This document contains information on a product under development. Freescale reserves the
right to change or discontinue this product without notice.
2.1 V and 20 MHz CPU above 1.8 V across temperature range of -40°C to
105°C.
or signed fractional inputs.
read/program/erase over full operating voltage and temperature; allows
interrupt processing while programming.
contents.
disable clocks to unused modules to reduce currents.
timeout.
provide accurate clock source to the TOD. 6 usec typical wake up time
from stop3 mode.
ceramic resonator dedicated for TOD operation.
be used for system clock and USB operations.
of internal reference allows 0.2% resolution and 2% deviation over
temperature and voltage; supports CPU frequencies from 4 kHz to
50 MHz.
dedicated 1 kHz internal clock source or bus clock.
separate low voltage warning with optional interrupt; selectable trip points.
connection supports same electrical interface used by the S08 family
debug modules.
data).
conditions.
device, host or OTG configuration. On-chip transceiver and 3.3V regulator
for a comparison of features by device.
®
V1 family of 32-bit
Preliminary — Subject to Change
MCF51JE256/128
80-LQFP
12mm x 12mm
• SCIx — Two serial communications interfaces with optional 13-bit break;
• SPI1 — Serial peripheral interface with 64-bit FIFO buffer; 16-bit or 8-bit
• SPI2 — Serial peripheral interface with full-duplex or single-wire
• IIC — Up to 100 kbps with maximum bus loading; Multi-master operation;
• CMT — Carrier Modulator timer for remote control communications.
• TPMx — Two 4-channel Timer/PWM Module; Selectable input capture,
• Mini-FlexBus — Multi-function external bus interface with user
• PRACMP — Analog comparator with selectable interrupt; compare option
• ADC12 — 12-bit Successive approximation ADC with 4 differnential
• PDB — Programmable delay block with 16-bit counter and modulus and
• DAC — 12-bit resolution; 16-word data buffers with configurable
Input/Output
• Up to 68 GPIOs and 1 output-only pin.
• Voltage Reference output (VREFO).
• Dedicated infrared output pinwith high current
• Up to 16 KBI pins with selectable polarity.
• Up to 16 pins of rapid general purpose I/O.
help save system cost, fully compliant with USB Specification 2.0. Allows
control, bulk, interrupt and isochronous transfers.
option to connect Rx input to PRACMP output on SCI1 and SCI2; High
current drive on Tx on SCI1 and SCI2; wake-up from stop3 on Rx edge.
data transfers; full-duplex or single-wire bidirectional; double-buffered
transmit and receive; master or slave mode; MSB-first or LSB-first shifting.
bidirectional; Double-buffered transmit and receive; Master or Slave
mode; MSB-first or LSB-first shifting.
Programmable slave address; Interrupt driven byte-by-byte data transfer;
supports broadcast mode and 11-bit addressing.
Carrier generator, modulator and driver for dedicated infrared out (IRO).
Can be used as an output compare timer.
output compare, or buffered edge- or center-aligned PWM on each
channel; external clock input/pulse accumulator.
programmable chip selects and the option to multiplex address and data
lines.
to programmable internal reference voltage; operation in stop3.
channels and up to12 single-ended channels; internal bandgap reference
channel; operation in stop3; fully functional from 3.6V to 1.8V.
prescale to set reference clock to bus divided by 1 to bus divided by 2048;
8 trigger outputs for ADC module provides periodic coordination of ADC
sampling sequence with sequence completion interrupt; Back-to-Back
mode and Timed mode.
watermark.
sink capability.
Document Number: MCF51JE256
Document Number: MCF51JE256
81-BGA
10mm x 10mm
100-LQFP
14mm x 14mm
Rev. 3, 04/2010
Rev. 3, 04/2010
104-BGA
10mm x 10mm

Related parts for MCF51JE256CLL

MCF51JE256CLL Summary of contents

Page 1

... USB — Dual-role USB On-The-Go (OTG) device, supports USB in either device, host or OTG configuration. On-chip transceiver and 3.3V regulator This document contains information on a product under development. Freescale reserves the right to change or discontinue this product without notice. © Freescale Semiconductor, Inc., 2009-2010. All rights reserved. MCF51JE256/128 ® V1 family of 32-bit ...

Page 2

... Table 25.Internal USB 3.3 V Voltage Regulator Characteristics 45 Table 26.VREF Electrical Specifications . . . . . . . . . . . . . . . . . 46 Table 27.VREF Limited Range Operating Requirements Table 28.VREF Limited Range Operating Behaviors . . . . . . . . . 46 Table 29.Orderable Part Number Summary Table 30.Package Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . 48 Table 31.Revision History Preliminary — Subject to Change . . . . . . . . . . . . . . . . . . . . . . . . 47 DD Freescale Semiconductor ...

Page 3

... Freescale Semiconductor Figure 1. MCF51JE256/128 Block Diagram Preliminary — Subject to Change 1-3 ...

Page 4

... DATA DATA DATA yes yes yes yes yes yes yes yes yes Freescale Semiconductor 80 yes yes yes yes yes yes yes yes yes yes yes yes 4 4 yes yes yes DATA 9 yes 4 8 yes ...

Page 5

... RAM (Random-Access Memory) RGPIO (Rapid General-purpose Input/output) SCI1, SCI2 (Serial Communications Interfaces) SIM (system integration unit) Freescale Semiconductor Table 2. MCF51JE256/128 Functional Units Used to output voltage levels. Measures analog voltages bits of resolution. The ADC has single-ended inputs. Precisely trigger the DAC FIFO buffer. ...

Page 6

... Timer/PWM module can be used for a variety of generic timer operations as well as pulse-width modulation. Controls power management across the device. These devices incorporate redundant crystal oscillators. One is intended primarily for use by the TOD, and the other by the CPU and other peripherals. Preliminary — Subject to Change Freescale Semiconductor ...

Page 7

... PTA4 PTB1 E VSSA PTA7 PTB0 F VREFL G DADP2 H DADM2 PTA3 J DADP0 DADM0 PTH7 K DADM3 DADP1 L DADP3 DACO DADM1 Freescale Semiconductor USB_DM VUSB33 PTF4 PTF3 VBUS PTF5 PTJ6 PTH0 PTG2 PTG6 PTG5 PTG7 VDD1 VDD2 PTG1 VSS1 VSS2 PTH6 PTH4 PTH3 PTH2 PTH5 ...

Page 8

... LQFP Figure 3. 100-Pin LQFP Preliminary — Subject to Change PTE4/CMPP3/TPMCLK/IRQ 75 74 PTE3/KBI2P6/FB_AD8 73 PTE2/KBI2P5/RGPIOP14/FB_AD7 72 PTE1/KBI2P4/RGPIOP13/FB_AD6 71 PTJ3/RGPIOP12/FB_AD5 70 PTJ2/FB_AD4 69 PTJ1/FB_AD3 68 PTJ0/FB_AD2 PTE0/KBI2P3/FB_ALE/FB_CS1 67 PTD7/USB_PULLUP(D+)/RX1 66 65 PTD6/USB_ALTCLK/TX1 64 PTD5/SCL/RGPIOP11/TPM1CH3 PTD4/SDA/RGPIOP10/TPM1CH2 63 62 PTD3/USB_PULLUP(D+)/RGPIOP9/TPM1CH1 61 PTD2/USB_ALTCLK/RGPIOP8/TPM1CH0 60 PTD1/CMPP2/RESET PTD0/BKGD/ PTC7/KBI2P2/CLKOUT/ADP11 57 PTC6/KBI2P1/PRACMPO/ADP10 56 PTC5/KBI2P0/CMPP1/ADP9 55 PTC4/KBI1P7/CMPP0/ADP8 54 PTC3/KBI1P6/SS2/ADP7 53 PTC2/KBI1P5/SPSCK2/ADP6 52 PTC1/MISO2/FB_D0/FB_AD1 51 PTC0/MOSI2/FB_OE/FB_CS0 Freescale Semiconductor ...

Page 9

... PTA0 PTG1 C PTA4 PTA5 D PTA7 E DADM2 F DADP2 G DADP0 DACO DADP3 H DADM0 DADM1 DADP1 J VSSA VREFL VREFH 1 2 Freescale Semiconductor PTF6 USB_DP VBUS VUSB33 USB_DM PTF5 PTE7 PTA6 PTA1 PTF2 PTE6 PTB0 PTB1 PTA2 PTA3 VDD2 VDD3 VDD1 VSS2 VSS3 VSS1 DADM3 ...

Page 10

... PTA6 8 PTA7 9 PTB0 10 PTB1/BLMS 11 VSSA 12 VREFL DADP2 DADM2 1 80-Pin LQFP Figure 5. 80-Pin LQFP Preliminary — Subject to Change PTE4/CMPP3/TPMCLK/IRQ PTE3/KBI2P6/FB_AD8 PTE2/KBI2P5/RGPIOP14/FB_AD7 PTE1/KBI2P4/RGPIOP13/FB_AD6 PTE0/KBI2P3/FB_ALE/FB_CS1 PTD7/USB_PULLUP(D+)/RX1 PTD6/USB_ALTCLK/TX1 PTD5/SCL/RGPIOP11/TPM1CH3 PTD4/SDA/RGPIOP10/TPM1CH2 PTD3/USB_PULLUP(D+)/RGPIOP9/TPM1CH1 PTD2/USB_ALTCLK/RGPIOP8/TPM1CH0 PTD1/CMPP2/RESET PTD0/BKGD/MS PTC7/KBI2P2/CLKOUT/ADP11 PTC6/KBI2P1/PRACMPO/ADP10 PTC5/KBI2P0/CMPP1/ADP9 PTC4/KBI1P7/CMPP0/ADP8 PTC3/KBI1P6/SS2/ADP7 PTC2/KBI1P5/SPSCK2/ADP6 PTC1/MISO2/FB_D0/FB_AD1 Freescale Semiconductor ...

Page 11

... DADM2 — — DACO DADP3 — DADM3 Freescale Semiconductor Table 3. Package Pin Assignments Alternate Alternate Alternate FB_D2 SS1 — — — — FB_RW — — FB_AD19 — — FB_AD18 — — FB_OE — — FB_D0 — — KBI1P0 TX1 FB_D1 KBI1P1 ...

Page 12

... Preliminary — Subject to Change Composite Pin Name DADP0 DADM0 VREFO DADP1 DADM1 VREFH VDDA VSS2 PTB2/EXTAL1 PTB3/XTAL1 VDD2 PTB4/EXTAL2 PTB5/XTAL2 PTB6/KBI1P3/RGPIOP0/FB_AD17 PTB7/KBI1P4/RGPIOP1/FB_AD0 PTH2/RGPIOP2/FB_D7 PTH3/RGPIOP3/FB_D6 PTH4/RGPIOP4/FB_D5 PTH5/RGPIOP5/FB_D4 PTH6/RGPIOP6/FB_D3 PTH7/RGPIOP7/FB_D2 PTC0/MOSI2/FB_OE/FB_CS0 PTC1/MISO2/FB_D0/FB_AD1 PTC2/KBI1P5/SPSCK2/ADP6 PTC3/KBI1P6/SS2/ADP7 PTC4/KBI1P7/CMPP0/ADP8 PTC5/KBI2P0/CMPP1/ADP9 PTC6/KBI2P1/PRACMPO/ADP10 PTC7/KBI2P2/CLKOUT/ADP11 PTD0/BKGD/MS PTD1/CMPP2/RESET Freescale Semiconductor ...

Page 13

... PTJ4 A10 85 — — PTJ5 B6 86 — — PTJ6 A9 87 — — PTJ7 Freescale Semiconductor Table 3. Package Pin Assignments Alternate Alternate Alternate USB_ALTCLK RGPIOP8 TPM1CH0 USB_PULLUP RGPIOP9 TPM1CH1 PTD3/USB_PULLUP(D+)/RGPIOP9/TPM1CH1 (D+) SDA RGPIOP10 TPM1CH2 SCL RGPIOP11 TPM1CH3 USB_ALTCLK TX1 — ...

Page 14

... USB_ — — SESSEND USB_DM_ — — DOWN USB_DP_ — — DOWN — — Preliminary — Subject to Change Composite Pin Name FB_AD12 PTF3/SCL/FB_D5/FB_AD11 PTF4/SDA/FB_D4/FB_AD10 PTF5/KBI2P7/FB_D3/FB_AD9 VUSB33 USB_DM USB_DP VBUS VSS1 VDD1 PTF6/MOSI1 PTF7/MISO1 PTG0/SPSCK1 PTG1/USB_SESSEND PTG2/USB_DM_DOWN PTG3/USB_DP_DOWN PTG4/USB_SESSVLD Freescale Semiconductor ...

Page 15

... All values shown in the typical column are within this category. D Those parameters are derived mainly from simulations. The classification is shown in the column labeled “C” in the parameter tables where appropriate. Freescale Semiconductor NOTE Table 4. Parameter Classifications NOTE Preliminary — Subject to Change Preliminary Electrical Characteristics ...

Page 16

... DD SS and range during instantaneous and operating maximum DD > greater than Preliminary — Subject to Change Value Unit –0 3.8 V 120 mA –0 0 ± °C –55 to 150 , the injection current may flow out of DD load will shunt current Freescale Semiconductor ...

Page 17

... Watts — chip internal power int Power dissipation on input and output pins — user determined I/O << P For most applications, P I/O ( neglected) is: I/O Freescale Semiconductor or V will be very small Table 6. Thermal Characteristics Rating MCF51JE256 MCF51JE128 1,2,3,4 Single-layer board — 1s 104-pin MBGA 100-pin LQFP ...

Page 18

... Preliminary — Subject to Change Equation 3 by measuring and T can be obtained Symbol Value Unit Ω R1 1500 C 100 pF — 3 — Ω 200 pF — 3 — — –2.5 V — 7.5 V Min Max Unit ±2000 — V ±200 — V ±500 — V ±100 — mA Freescale Semiconductor Eqn. 2 Eqn ...

Page 19

... Output high voltage Output high 3 I OHT current Output low voltage Output low 5 I OLT current Freescale Semiconductor Table 9. DC Characteristics Condition Min 2 — 1.8 All I/O pins, low-drive strength 1 – Load DD = –600 μA 0.5 All I/O pins, high-drive strength 2 – Load DD = – ...

Page 20

... V DD 0.30 x — — — — 0.25 μA — — P (TBD) μA — — 0. μA — — 0.5 17.5 — 52.5 kΩ P 17.5 — 52.5 kΩ P –0.2 — 0 –5 — — — — 0.6 1 0.9 1.4 1. μs 10 — — D Freescale Semiconductor ...

Page 21

... This will be the greatest risk when the MCU is not consuming power. Examples are system clock is present clock rate is very low (which would reduce overall power consumption). 7 Maximum is highest voltage that POR is guaranteed. Freescale Semiconductor Table 9. DC Characteristics (Continued) Condition V ...

Page 22

... Preliminary Electrical Characteristics 8 Run at 1 MHz bus frequency 9 Low voltage detection and warning limits measured at 1 MHz bus frequency. 10 Factory trimmed 3.0 V, Temp = 25°C DD 1-2 Preliminary — Subject to Change Freescale Semiconductor ...

Page 23

... FEI mode; All modules OFF DD current Run 3 RI supply LPS=0; All modules OFF DD current Run RI 4 supply LPS=1, all modules OFF DD current Freescale Semiconductor Table 10. Supply Current Characteristics Bus V (V) Typ DD Freq 25.165 3 43 MHz 25.165 3 43 MHz 20 MHz 3 31.6 ...

Page 24

... T 105 –40 to — 105 –40 to — 105 –40 to 0.640 µ µ µ 31.5 µA 105 P –40 to 0.640 µ µ µ µA 105 C –40 to 1.2 µ µ µ µA 105 P –40 to 0.900 µ µ µ µA 105 C Freescale Semiconductor ...

Page 25

... Not using the bandgap 1 6 ACMP (BGBE = 0) ADLPC = ADLSMP = ADC Not using the bandgap (BGBE = 0) High power mode; no load DAC DACO 1 Not available in stop2 mode. Freescale Semiconductor Table 11. Typical Stop Mode Adders Temperature (°C) Condition -40 25 — 600 650 (TBD) (TBD) — ...

Page 26

... DDACT1 I — DDACT2 I — DDDIS VAIN V SS VAIO — — ALKG tAINIT — Preliminary — Subject to Change Typical Max Unit — 3.6 V μA — 60 μA — 40 — – 0.3 — — 20.0 mV — μs — 1.0 Freescale Semiconductor — ...

Page 27

... Programmable reference generator voltage 13 range 3.8 12-bit DAC Electricals Table 13. DAC 12LV Operating Requirements # Characteristic 1 Supply voltage 2 Reference voltage 3 Temperature 4 Output load capacitance 5 Output load current Freescale Semiconductor Table 12. PRACMP Electrical Specifications Symbol Min 1.8 In2 DD25 t — PRGST Vstep –0.25 Vprgout V In ...

Page 28

... Notes 12 bit C µA 100 C 500 µA C (TBD) 200 µs C (TBD) µ µ µs 1(TBD) C 100 mV C (TBD) — ± 8 LSB C ± 1 LSB C %FS ± 0 ± 0.5 %FS C (TBD — See Typical mV C (TBD) Drift figure that follows. µV/yr TBD C Freescale Semiconductor ...

Page 29

... Ref Voltage Low REFL 6 V Input Voltage ADIN Input 7 C ADIN Capacitance 8 R Input Resistance ADIN Analog Source Resistance ADC Conversion 10 f ADCK Clock Freq. Freescale Semiconductor Table 15. 12-bit ADC Operating Conditions Conditions Min Typ Absolute 1.8 Delta -100 DDAD Delta -100 SSAD 1 ...

Page 30

... MHz unless otherwise stated. Typical values are for reference only ADCK SIMPLIFIED INPUT PIN EQUIVALENT CIRCUIT Pad Z AS leakage due to input protection + V ADIN – INPUT PIN INPUT PIN INPUT PIN Preliminary — Subject to Change Z ADIN SIMPLIFIED CHANNEL SELECT CIRCUIT ADC SAR ENGINE R ADIN R ADIN R ADIN R ADIN C ADIN Freescale Semiconductor ...

Page 31

... Non-Linearity 11-bit differential mode 10-bit single-ended mode 9-bit differential mode 8-bit single-ended mode Integral Non-Linearity 12-bit single-ended mode 11-bit differential mode 10-bit single-ended mode 9-bit differential mode 8-bit single-ended mode Freescale Semiconductor = V , > 1. REFH DDAD REFL SSAD 1 Symb Min Typ — ...

Page 32

... Typical values are for ADCK Preliminary — Subject to Change Max Unit C Comment V 2 ADIN LSB ±2 SSAD ±1.0 T ±1.0 ±0.5 T ±0 ADIN LSB ±3 DDAD ±1.5 T ±1.5 ±0.5 T ±0.5 ±0.5 2 LSB leakage In current mV D (refer characteristi cs) — mV/× — — Freescale Semiconductor = = ...

Page 33

... Lock frequency tolerance 12 Lock time Loss of external clock minimum frequency - RANGE = 0 13 Loss of external clock minimum frequency - RANGE = This should not exceed the maximum CPU frequency for this device. Freescale Semiconductor Symbol Min t — irefst factory trimmed at VDD=3.0 V and — f int_ft temp=25° ...

Page 34

... Jitter C Ambient) ° 1 Min Typ Max f 32 — 38.4 lo fhi 1 — 5 fhi 1 — 16 fhi 1 — See Note — — — — 1 — — 0 — — 100 — R — — — Freescale Semiconductor Unit kHz MHz MHz MHz MΩ kΩ kΩ ...

Page 35

... Input Setup MB5 D Input Hold 1 Specification is valid for all MB_A[19:0], MB_D[7:0], MB_CS[1:0], MB_OE, MB_R/W, and MB_ALE. 2 Specification is valid for all MB_D[7:0]. Freescale Semiconductor Symbol Low range, low gain (RANGE = 0, HGO = 0) Low range, high gain (RANGE = 0, HGO = 1) High range, low gain (RANGE = 1, HGO = 0) ...

Page 36

... MB2 FB_D[7:0] ADDR[31:24] DATA[7:0] ADDR[19:16] ADDR[15:0] DATA[15:0] FB_R/W FB_ALE Figure 9. Mini-FlexBus Read Timing S0 S1 FB_CLK MB1 8 : ADDR[19 MB2 ADDR[7:0] DATA[7:0] ADDR[19:16] ADDR[15:0] DATA[15:0] FB_R/W FB_ALE FB_CSn FB_OE Figure 10. Mini-FlexBus Write Timing Preliminary — Subject to Change MB3 MB5 MB4 MB3 Freescale Semiconductor ...

Page 37

... IRQ pulse width 7 • Asynchronous path t t ILIH, IHIL • Synchronous path KBIPx pulse width 8 • Asynchronous path t t ILIH, IHIL • Synchronous path Freescale Semiconductor Table 20. Control Timing Min = 1/f ) cyc Bus ≥ 1 > 2 > 2 800 2 ...

Page 38

... Slew rate control — enabled (PTxSE = °C unless otherwise stated. DD levels. Temperature range –40 °C to 105 °C. and 80 extrst Figure 11. Reset Timing t IHIL t ILIH Figure 12. IRQ/KBIPx Timing Preliminary — Subject to Change 1 Typical Max C Unit ns 11 — — — — D Freescale Semiconductor ...

Page 39

... External clock frequency 2 — External clock period 3 D External clock high time 4 D External clock low time 5 D Input capture pulse width TPMxCLK TPMxCHn TPMxCHn Freescale Semiconductor Table 21. TPM Input Timing Function Symbol f TPMext t TPMext t clkh t clkl t ICPW t TPMext t clkh ...

Page 40

... SPSCK 1 — t cyc 1/2 — t SPSCK 1 — t cyc – 30 1024 t ns cyc – 30 — — — — — ns — cyc — cyc — — — — ns — t – cyc — — t – cyc — Freescale Semiconductor ...

Page 41

... Figure 2 All timing is shown with respect to 20 and 70 unless noted; 100 pF load on all SPI pins. All timing assumes slew rate control disabled and high drive strength enabled for SPI output pins. Freescale Semiconductor Table 23. SPI Electrical Characteristic 2 Symbol Min Master ...

Page 42

... LSBF = 0. For LSBF = 1, bit order is LSB, bit 1, ..., bit 6, MSB. 1 BIT BIT MSB OUT Figure 15. SPI Master Timing (CPHA = (2) MSB IN BIT (2) MSB OUT BIT Figure 16. SPI Master Timing (CPHA = 1) Preliminary — Subject to Change 3 LSB IN 12 LSB OUT 3 LSB IN LSB OUT Freescale Semiconductor ...

Page 43

... Not defined, but normally MSB of character just received SS (INPUT) SCK (CPOL = 0) (INPUT) SCK (CPOL = 1) (INPUT) MISO SEE (OUTPUT) NOTE 8 MOSI (INPUT) NOTE: 1. Not defined, but normally LSB of character just received Freescale Semiconductor BIT MSB OUT 7 BIT Figure 17. SPI Slave Timing (CPHA = ...

Page 44

... Burst t Page t Mass 10,000 — D_ret Preliminary — Subject to Change supply. DD Typical Max Unit — 3.6 V — 3.6 V — 200 kHz μs — 6. Fcyc 4 t Fcyc 4000 t Fcyc 20,000 t Fcyc — — cycles 100,000 — 100 — years Freescale Semiconductor ...

Page 45

... Table 25. Internal USB 3.3 V Voltage Regulator Characteristics # Characteristic 1 Regulator operating voltage 2 VREG output V input with internal VREG USB33 3 disabled 4 VREG Quiescent Current Freescale Semiconductor Symbol Min Typ V 3.9 — regin V 3 3.3 regout V 3 3.3 ...

Page 46

... Unit 3.6 V 105 °C — 100 nf — 1.152 — mV (TBD) — TBD ppm/year — 0.10 µA — 75 µA — 125 µA — 1.1 mA — 100 µV/mA — TBD mV — dB Max Unit C Notes 50 °C C Max Unit C Notes TBD µA C Freescale Semiconductor — ...

Page 47

... Freescale Semiconductor Figure 19. Typical Output vs. Temperature TBD Figure 20. Typical Output vs. V Preliminary — Subject to Change Preliminary Electrical Characteristics DD 1-4 ...

Page 48

... MCF51JE256VLL MCF51JE256 ColdFire Microcontroller MCF51JE256VMB MCF51JE256 ColdFire Microcontroller MCF51JE256VLK MCF51JE256 ColdFire Microcontroller MCF51JE128VMB MCF51JE128 ColdFire Microcontroller MCF51JE256CML MCF51JE256 ColdFire Microcontroller MCF51JE256CLL MCF51JE256 ColdFire Microcontroller MCF51JE256CMB MCF51JE256 ColdFire Microcontroller MCF51JE256CLK MCF51JE256 ColdFire Microcontroller MCF51JE128CMB MCF51JE128 ColdFire Microcontroller MCF51JE128CLK MCF51JE128 ColdFire Microcontroller 4.2 ...

Page 49

... Revision Date 0 March/April 09 1 July 09 2 July 09 3 April 10 Freescale Semiconductor Table 30, or ® website (http://www.freescale.com), and enter the appropriate Table 30) in the “Enter Keyword” search box at the top of the page. Table 31. Revision History Description Initial Draft • Revised to follow standard template. ...

Page 50

... Freescale Semiconductor product could create a situation where personal injury or death may occur. Should Buyer ...

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