MCF51MM256CMB Freescale Semiconductor, MCF51MM256CMB Datasheet

IC MCU 32BIT 256K FLASH 81MAPBGA

MCF51MM256CMB

Manufacturer Part Number
MCF51MM256CMB
Description
IC MCU 32BIT 256K FLASH 81MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF51MMr
Datasheet

Specifications of MCF51MM256CMB

Core Processor
Coldfire V1
Core Size
32-Bit
Speed
50MHz
Connectivity
CAN, EBI/EMI, I²C, SCI, SPI, USB OTG
Peripherals
LVD, PWM, WDT
Number Of I /o
48
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 8x16b, D/A 1x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
81-LBGA
Processor Series
MCF51MM
Core
ColdFire V1
Data Bus Width
32 bit
Mounting Style
SMD/SMT
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
TWR-MCF51MM-KIT, TWR-SER, TWR-ELEV, TOWER
Package
81MAPBGA
Device Core
ColdFire
Family Name
MCF51MM
Maximum Speed
50.33 MHz
Operating Supply Voltage
2.5|3.3 V
Number Of Programmable I/os
48
Interface Type
I2C/SCI/SPI
On-chip Adc
8-chx16-bit
On-chip Dac
1-chx12-bit
Number Of Timers
1
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCF51MM256CMB
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
An Energy-Efficient Solution from Freescale
MCF51MM256/128
The MCF51MM256 series devices are members of the
low-cost, low-power, high-performance ColdFire
32-bit microcontrollers (MCUs) designed for handheld
metering devices.
Not all features are available in all devices or packages; see
Table 2
Freescale Semiconductor
Data Sheet: Technical Data
32-Bit ColdFire V1 Central Processor Unit (CPU)
• Up to 50.33-MHz ColdFire CPU above 2.4 V and 40 MHz CPU above
• ColdFire Instruction Set Revision C (ISA_C).
• 32-bit multiply and accumulate (MAC) supports signed or unsigned integer
On-Chip Memory
• 256 K Flash comprised of two independent 128 K flash arrays;
• 32 Kbytes System Random-access memory (RAM).
• Security circuitry to prevent unauthorized access to RAM and Flash
Power-Saving Modes
• Two ultra-low power stop modes. Peripheral clock enable register can
• Time of Day (TOD) — Ultra low-power 1/4 sec counter with up to 64s
• Ultra-low power external oscillator that can be used in stop modes to
Clock Source Options
• Oscillator (XOSC1) — Loop-control Pierce oscillator; 32.768 kHz crystal or
• Oscillator (XOSC2) for high frequency crystal input for MCG reference to
• Multipurpose Clock Generator (MCG) — PLL and FLL; precision trimming
System Protection
• Watchdog computer operating properly (COP) reset with option to run from
• Low-voltage detection with reset or interrupt; selectable trip points;
• Illegal opcode and illegal address detection with reset.
• Flash block protection for each array to prevent accidental write/erasure.
• Hardware CRC to support fast cyclic redundancy checks.
Development Support
• Integrated ColdFire DEBUG_Rev_B+ interface with single wire BDM
• Real-time debug with 6 hardware breakpoints (4 PC, 1 address and 1
• On-chip trace buffer provides programmable start/stop recording
Peripherals
• USB — Dual-role USB On-The-Go (OTG) device, supports USB in either
© Freescale Semiconductor, Inc., 2009-2010. All rights reserved.
Freescale reserves the right to change the detail specifications as may be required to permit
improvements in the design of its products.
2.1 V and 20 MHz CPU above 1.8 V across temperature range of -40°C to
105°C.
or signed fractional inputs.
read/program/erase over full operating voltage and temperature; allows
interrupt processing while programming.
contents.
disable clocks to unused modules to reduce currents.
timeout.
provide accurate clock source to the TOD. 6 usec typical wake up time
from stop3 mode.
ceramic resonator dedicated for TOD operation.
be used for system clock and USB operations.
of internal reference allows 0.2% resolution and 2% deviation over
temperature and voltage; supports CPU frequencies from 4 kHz to
50 MHz.
dedicated 1 kHz internal clock source or bus clock.
separate low voltage warning with optional interrupt; selectable trip points.
connection supports same electrical interface used by the S08 family
debug modules.
data).
conditions.
device, host or OTG configuration. On-chip transceiver and 3.3V regulator
Freescale reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
for a comparison of features by device.
®
V1 family of
80-LQFP
12mm x 12mm
• SCIx — Two serial communications interfaces with optional 13-bit break;
• SPI1 — Serial peripheral interface with 64-bit FIFO buffer; 16-bit or 8-bit
• SPI2 — Serial peripheral interface with full-duplex or single-wire
• IIC — Up to 100 kbps with maximum bus loading; Multi-master operation;
• CMT — Carrier Modulator timer for remote control communications.
• TPMx — Two 4-channel Timer/PWM Module; Selectable input capture,
• Mini-FlexBus — Multi-function external bus interface with user
• PRACMP — Analog comparator with selectable interrupt; compare option
Measurement Engine
• ADC16 — 16-bit successive approximation ADC with up to 4 dedicated
• PDB — Programmable delay block with 16-bit counter and modulus and
• DAC — 12-bit resolution; 16-word data buffers with configurable
• OPAMPx — 2 flexible operational amplifiers configurable for general
• TRIAMPx — 2 trans-impedance amplifiers dedicated for converting
Input/Output
• Up to 68 GPIOs and 1 output-only pin.
• Voltage Reference output (VREFO).
• Dedicated infrared output pinwith high current
• Up to 16 KBI pins with selectable polarity.
• Up to 16 pins of rapid general purpose I/O.
help save system cost, fully compliant with USB Specification 2.0. Allows
control, bulk, interrupt and isochronous transfers.
option to connect Rx input to PRACMP output on SCI1 and SCI2; High
current drive on Tx on SCI1 and SCI2; wake-up from stop3 on Rx edge.
data transfers; full-duplex or single-wire bidirectional; double-buffered
transmit and receive; master or slave mode; MSB-first or LSB-first shifting.
bidirectional; Double-buffered transmit and receive; Master or Slave
mode; MSB-first or LSB-first shifting.
Programmable slave address; Interrupt driven byte-by-byte data transfer;
supports broadcast mode and 11-bit addressing.
Carrier generator, modulator and driver for dedicated infrared out (IRO).
Can be used as an output compare timer.
output compare, or buffered edge- or center-aligned PWM on each
channel; external clock input/pulse accumulator.
programmable chip selects and the option to multiplex address and data
lines.
to programmable internal reference voltage; operation in stop3.
differential channels and 8 single-ended channels; range compare
function; 1.7 mV/C temperature sensor; internal bandgap reference
channel; operation in stop3; fully functional from 3.6 V to 1.8 V,
Configurable hardware trigger for 8 Channel select and result registers.
prescale to set reference clock to bus divided by 1 to bus divided by 2048;
8 trigger outputs for ADC module provides periodic coordination of ADC
sampling sequence with sequence completion interrupt; Back-to-Back
mode and Timed mode.
watermark.
operations; Low offset and temperature drift.
current inputs into voltages.
sink capability.
Document Number: MCF51MM256
Document Number: MCF51MM256
81-BGA
10mm x 10mm
100-LQFP
14mm x 14mm
Rev. 4, 10/2010
Rev. 4, 10/2010
104-BGA
10mm x 10mm

Related parts for MCF51MM256CMB

MCF51MM256CMB Summary of contents

Page 1

... Freescale reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. © Freescale Semiconductor, Inc., 2009-2010. All rights reserved. Freescale reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. Document Number: MCF51MM256 Document Number: MCF51MM256 ® ...

Page 2

... Table 27.VREF Limited Range Operating Behaviors . . . . . . . . . 50 Table 28.TRIAMP Characteristics 1.8–3.6 V, –40°C~105° Table 29.OPAMP Characteristics 1.8–3 Table 30.Orderable Part Number Summary Table 31.Package Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . 55 Table 32.Revision History > 1.8, VREFL = VSSA  8 MHz, – DDA  4 MHz, ADACK Freescale Semiconductor ...

Page 3

... The 80/81 pin packages contain the Mini-FlexBus data pins to support an 8-bit data bus interface to external peripherals. 3 Each differential channel is comprised of 2 pin inputs. Freescale Semiconductor Freescale reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. MCF51MM256 ...

Page 4

... Features 4 Freescale reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. Figure 1. MCF51MM256/128 Block Diagram Freescale Semiconductor ...

Page 5

... VREF (Voltage Reference) RAM (Random-Access Memory) RGPIO (Rapid General-purpose Input/output) Freescale Semiconductor Freescale reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. Table 2. MCF51MM256/128 Functional Units DAC (digital to analog converter) — Used to output voltage levels. ...

Page 6

... Timer/PWM module can be used for a variety of generic timer operations as well as pulse-width modulation. Controls power management across the device. These devices incorporate redundant crystal oscillators. One is intended primarily for use by the TOD, and the other by the CPU and other peripherals. Freescale Semiconductor ...

Page 7

... VINN1 PTA3 J DADP0 DADM0 PTH7 K VINP2 VINN2 DADP1 L TRIOUT2 DACO DADM1 Freescale Semiconductor Freescale reserves the right to change the detail specifications as may be required to permit improvements in the design of its products USB_DM VUSB33 PTF4 PTF3 VBUS PTF5 PTJ6 PTH0 PTG2 PTG6 PTG5 PTG7 ...

Page 8

... Freescale reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. 100 LQFP Figure 3. 100-Pin LQFP PTE4/CMPP3/TPMCLK/IRQ 75 74 PTE3/KBI2P6/FB_AD8 73 PTE2/KBI2P5/RGPIOP14/FB_AD7 72 PTE1/KBI2P4/RGPIOP13/FB_AD6 71 PTJ3/RGPIOP12/FB_AD5 70 PTJ2/FB_AD4 69 PTJ1/FB_AD3 68 PTJ0/FB_AD2 PTE0/KBI2P3/FB_ALE/FB_CS1 67 PTD7/USB_PULLUP(D+)/RX1 66 65 PTD6/USB_ALTCLK/TX1 64 PTD5/SCL/RGPIOP11/TPM1CH3 PTD4/SDA/RGPIOP10/TPM1CH2 63 62 PTD3/USB_PULLUP(D+)/RGPIOP9/TPM1CH1 61 PTD2/USB_ALTCLK/RGPIOP8/TPM1CH0 60 PTD1/CMPP2/RESET PTD0/BKGD/ PTC7/KBI2P2/CLKOUT/ADP11 57 PTC6/KBI2P1/PRACMPO/ADP10 56 PTC5/KBI2P0/CMPP1/ADP9 55 PTC4/KBI1P7/CMPP0/ADP8 54 PTC3/KBI1P6/SS2/ADP7 53 PTC2/KBI1P5/SPSCK2/ADP6 52 PTC1/MISO2/FB_D0/FB_AD1 51 PTC0/MOSI2/FB_OE/FB_CS0 Freescale Semiconductor ...

Page 9

... VINP1 TRIOUT1 G DADP0 DACO TRIOUT2 H DADM0 DADM1 DADP1 J VSSA VREFL VREFH 1 2 Freescale Semiconductor Freescale reserves the right to change the detail specifications as may be required to permit improvements in the design of its products PTF6 USB_DP VBUS VUSB33 USB_DM PTF5 PTE7 PTA6 PTA1 PTF2 PTE6 ...

Page 10

... Freescale reserves the right to change the detail specifications as may be required to permit improvements in the design of its products 80-Pin LQFP Figure 5. 80-Pin LQFP PTE4/CMPP3/TPMCLK/IRQ PTE3/KBI2P6/FB_AD8 PTE2/KBI2P5/RGPIOP14/FB_AD7 PTE1/KBI2P4/RGPIOP13/FB_AD6 PTE0/KBI2P3/FB_ALE/FB_CS1 PTD7/USB_PULLUP(D+)/RX1 PTD6/USB_ALTCLK/TX1 PTD5/SCL/RGPIOP11/TPM1CH3 PTD4/SDA/RGPIOP10/TPM1CH2 PTD3/USB_PULLUP(D+)/RGPIOP9/TPM1CH1 PTD2/USB_ALTCLK/RGPIOP8/TPM1CH0 PTD1/CMPP2/RESET PTD0/BKGD/MS PTC7/KBI2P2/CLKOUT/ADP11 PTC6/KBI2P1/PRACMPO/ADP10 PTC5/KBI2P0/CMPP1/ADP9 PTC4/KBI1P7/CMPP0/ADP8 PTC3/KBI1P6/SS2/ADP7 PTC2/KBI1P5/SPSCK2/ADP6 PTC1/MISO2/FB_D0/FB_AD1 Freescale Semiconductor ...

Page 11

... DACO DADP3 VINP2 DADM3 Freescale Semiconductor Freescale reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. Table 3. Package Pin Assignments Alternate Alternate Alternate FB_D2 SS1 — — — — FB_RW — — FB_AD19 — — ...

Page 12

... BKGD MS — CMPP2 RESET — Composite Pin Name DADP0 DADM0 VREFO DADP1 DADM1 VREFH VDDA VSS2 PTB2/EXTAL1 PTB3/XTAL1 VDD2 PTB4/EXTAL2 PTB5/XTAL2 PTB6/KBI1P3/RGPIOP0/FB_AD17 PTB7/KBI1P4/RGPIOP1/FB_AD0 PTH2/RGPIOP2/FB_D7 PTH3/RGPIOP3/FB_D6 PTH4/RGPIOP4/FB_D5 PTH5/RGPIOP5/FB_D4 PTH6/RGPIOP6/FB_D3 PTH7/RGPIOP7/FB_D2 PTC0/MOSI2/FB_OE/FB_CS0 PTC1/MISO2/FB_D0/FB_AD1 PTC2/KBI1P5/SPSCK2/ADP6 PTC3/KBI1P6/SS2/ADP7 PTC4/KBI1P7/CMPP0/ADP8 PTC5/KBI2P0/CMPP1/ADP9 PTC6/KBI2P1/PRACMPO/ADP10 PTC7/KBI2P2/CLKOUT/ADP11 PTD0/BKGD/MS PTD1/CMPP2/RESET Freescale Semiconductor ...

Page 13

... PTJ5 B6 86 — — PTJ6 A9 87 — — PTJ7 Freescale Semiconductor Freescale reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. Alternate Alternate Alternate USB_ALTCLK RGPIOP8 TPM1CH0 USB_PULLUP RGPIOP9 TPM1CH1 PTD3/USB_PULLUP(D+)/RGPIOP9/TPM1CH1 (D+) ...

Page 14

... SPSCK1 — — USB_ — — SESSEND USB_DM_ — — DOWN USB_DP_ — — DOWN — — Composite Pin Name FB_AD12 PTF3/SCL/FB_D5/FB_AD11 PTF4/SDA/FB_D4/FB_AD10 PTF5/KBI2P7/FB_D3/FB_AD9 VUSB33 USB_DM USB_DP VBUS VSS1 VDD1 PTF6/MOSI1 PTF7/MISO1 PTG0/SPSCK1 PTG1/USB_SESSEND PTG2/USB_DM_DOWN PTG3/USB_DP_DOWN PTG4/USB_SESSVLD Freescale Semiconductor ...

Page 15

... Those parameters are derived mainly from simulations. The classification is shown in the column labeled “C” in the parameter tables where appropriate. Freescale Semiconductor Freescale reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. NOTE Table 4. Parameter Classifications ...

Page 16

... DD SS and range during instantaneous and operating maximum DD > greater than Value Unit –0.3 to +3.8 V 120 mA –0 0  C –55 to 150 , the injection current may flow out of DD load will shunt current Freescale Semiconductor ...

Page 17

... Watts — chip internal power int Power dissipation on input and output pins — user determined I/O Freescale Semiconductor Freescale reserves the right to change the detail specifications as may be required to permit improvements in the design of its products will be very small Table 6. Thermal Characteristics Rating ...

Page 18

... Table 7. ESD and Latch-up Test Conditions Description Symbol V HBM Equation 3 by measuring and T can be obtained Symbol Value Unit  R1 1500 C 100 pF — 3 —  200 pF — 3 — — –2.5 V — 7.5 V Min Max Unit 2000 — V 200 — V Freescale Semiconductor and Eqn. 2 Eqn ...

Page 19

... Table 8. ESD and Latch-Up Protection Characteristics (continued) 3 Charge Device Model (CDM) 4 Latch-up Current 125C A Freescale Semiconductor Freescale reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. Electrical Characteristics 500 V — CDM 00 I — ...

Page 20

... V DD – 0.5 — — – 0.5 — — – 0.5 — — — — 100 mA — — 0.5 V — — 0.5 V — — 0.5 V — — 0.5 V — — 100 mA — — — — Freescale Semiconductor C — ...

Page 21

... LVDH threshold — high range Low-voltage detection 19 V LVDL threshold — 9 low range Freescale Semiconductor Freescale reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. Table 9. DC Characteristics (continued) Condition  2 1 all digital inputs — ...

Page 22

... This will be the DD 1 Min Typ Max Unit 2.36 2.46 2.56 V 2.36 2.46 2.56 V 2.11 2.16 2.22 V 2.16 2.21 2.27 V — 50 — mV 1.110 1.17 1.230 V . LVDL or V and should be left floating when not DD SS and could result in external power DD Freescale Semiconductor ...

Page 23

... RI LPS=0; all modules OFF DD current Run supply RI 4 LPS=1, all modules OFF DD current Freescale Semiconductor Freescale reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. Table 10. Supply Current Characteristics Bus V (V) Typ DD Freq 2 25.165 ...

Page 24

... N/A 3 3 31.5 N/A 2 0.410 0.640 N/A 2 3.4 N/A 2 9 Temp Unit C (C) – 105 – 105 – 105 – 105 –40 to µA T 105 –40 to µ µ µ µA 105 P –40 to µ µ µ µA 105 C Freescale Semiconductor ...

Page 25

... LVDSE = 1 Not using the bandgap 1 6 PRACMP (BGBE = 0) ADLPC = ADLSMP = ADC Not using the bandgap (BGBE = 0) Freescale Semiconductor Freescale reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. Bus V (V) Typ DD Freq N/A 3 0.650 N ...

Page 26

... Freescale reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. Temperature (°C) Condition –40 25 339 345 41 43 276 350 42 49 420 432 52 52 Figure 6. Stop IDD versus Temperature Units 105 346 346 360 µ µA T 370 376 390 µ µA T 433 438 478 µ µA T Freescale Semiconductor ...

Page 27

... Supply voltage 2 Reference voltage 3 Temperature 4 Output load capacitance 5 Output load current # Characteristic 1 Resolution Freescale Semiconductor Freescale reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. Table 12. PRACMP Electrical Specifications Symbol Min V 1.8 PWR I — DDACT1 I — ...

Page 28

... V REFSEL µs — T • Temperature = 25°C 100 mV T — ± 8 LSB T ± 1 LSB T Calculated by a best fit curve from ± 3 %FSR 100mV to V REFH –100mV Calculated by a best fit curve from ± 0.5 %FSR T 100mV to V REFH –100mV Freescale Semiconductor = ...

Page 29

... V Supply voltage DDA V 2 DDA V 3 Ground voltage SSA 4 V Ref Voltage High REFH Freescale Semiconductor Freescale reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. Symbol Min Typ 60 PSRR — T — — — — ...

Page 30

... MHz unless otherwise stated. Typical values are for reference only ADCK 1 Max Unit C Comment SSA REFH k T External to MCU Assumes ADLSMP=0 0.5 k k k k k k k k k k k T 8.0 MHz D 5.0 MHz D 2.5 MHz D Freescale Semiconductor ...

Page 31

... – Figure 8. ADC Input Impedance Equivalency Diagram Freescale Semiconductor Freescale reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. SIMPLIFIED INPUT PIN EQUIVALENT CIRCUIT Pad Z AS leakage due to input protection + V ADIN – INPUT PIN INPUT PIN ...

Page 32

... C MHz 6.2 — 48/ –40 3 LSB T 56/ –28 3.0 T 3.5 1.5 T 1.5 1.0 T 1.0 5/–3 2 LSB T +5/–3 1 T 1 0.75 T 0.75 0.5 T 0.5 Freescale Semiconductor Comment ADLSMP =0 ADCO ADACK 1/f ADACK 32x Hardware Averaging (AVGE = %1 AVGS = %11) ...

Page 33

... Effective Avg=16 12 Number of Bits Avg=8 Avg=4 Avg=1 Signal to Noise 13 See ENOB plus Distortion Freescale Semiconductor Freescale reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.  8 MHz, – °C) (continued) , > 1. REFL SSA 1 Symb Min Typ  ...

Page 34

... V TEMP2 — 718 REFH DDA =2.0MHz unless otherwise stated. Typical values are for reference ADCK 2 Max Unit C C –74 — C — — — mV/× — — Freescale Semiconductor Comment /10 sample /10 sample leakage current (refer to DC characteri stics) ...

Page 35

... Freescale Semiconductor Freescale reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. ,  2  4 MHz, ADHSC = REFL ...

Page 36

... ADCK Max Unit C Comment +24 ADIN LSB T +24/0 V DDA 2.0 T 2.5 1.0 T 1.0 0.5 T 0.5 2 — LSB D 0.5 — — Bits C F /10 sample — 0 — — –90 /10 sample — — /10 sample 0 D — leakage current mV D (refer to DC characteri stics) Freescale Semiconductor ...

Page 37

... Loss of external clock minimum frequency - RANGE = This should not exceed the maximum CPU frequency for this device which is 50.33 MHz. Freescale Semiconductor Freescale reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. Symbol Min t — ...

Page 38

... C See crystal or resonator manufacturer’ recommendation — — — — 1 — — 0 — — 100 — — 0 — R — — — Freescale Semiconductor Unit C D kHz MHz D MHz D MHz D MHz M k k ...

Page 39

... The following timing numbers indicate when data is latched or driven onto the external bus, relative to the Mini-FlexBus output clock (MB_CLK). All other timing relationships can be derived from these values. Freescale Semiconductor Freescale reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. ...

Page 40

... Freescale reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. Characteristic S0 S1 FB_CLK MB1 :0] ADDR[19 MB2 FB_D[7:0] ADDR[31:24] DATA[7:0] ADDR[19:16] ADDR[15:0] DATA[15:0] FB_R/W FB_ALE Figure 9. Mini-FlexBus Read Timing Min Max Unit Notes — 25.1666 MHz — 39.73 — ns — 1 — 1.0 — — — MB3 MB5 MB4 Freescale Semiconductor ...

Page 41

... FB_AD[19 8-bit Non-Mux’d Bus FB_AD[7:0] FB_AD[19:16] 16-bit Mux’d Bus FB_AD[15:0] Freescale Semiconductor Freescale reserves the right to change the detail specifications as may be required to permit improvements in the design of its products FB_CLK MB1 :8] ADDR[19 MB2 ADDR[7:0] DATA[7:0] ADDR[19:16] ADDR[15:0] DATA[15:0] FB_R/W FB_ALE ...

Page 42

... Bus  1 > 2 > 2 700 2 100 ) 500 100 2 100 3 1 100 3 1 Typical Max C Unit MHz — — 20 25.165 D — s 1000 1300 P — — — — cyc — — — — — — ns cyc D — — ns cyc Freescale Semiconductor ...

Page 43

... In stop mode, the synchronizer is bypassed so shorter pulses can be recognized in that case. 4 Timing is shown with respect to 20% V RESET PIN IRQ/KBIPx IRQ/KBIPx Freescale Semiconductor Freescale reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. Table 21. Control Timing (continued) Min 4 , Low Drive ...

Page 44

... Table 22. TPM Input Timing Function Symbol f TPMext t TPMext t clkh t clkl t ICPW t TPMext t clkh t clkl Figure 13. Timer External Clock t ICPW t ICPW Figure 14. Timer Input Capture Pulse Min Max Unit MHz Bus 4 — t cyc 1.5 — t cyc 1.5 — t cyc 1.5 — t cyc Freescale Semiconductor ...

Page 45

... SPI output pins. 3 Time to data active from high-impedance state. 4 Hold time to high-impedance state. Freescale Semiconductor Freescale reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. Figure 18 describe the timing requirements for the SPI system. Table 23. SPI Timing ...

Page 46

... Freescale reserves the right to change the detail specifications as may be required to permit improvements in the design of its products BIT BIT MSB OUT Figure 15. SPI Master Timing (CPHA = (2) MSB IN BIT (2) MSB OUT BIT Figure 16. SPI Master Timing (CPHA = 1) 3 LSB IN 12 LSB OUT 3 LSB IN LSB OUT Freescale Semiconductor ...

Page 47

... SCK (CPOL = 1) (INPUT) MISO SEE (OUTPUT) NOTE 8 MOSI (INPUT) NOTE: 1. Not defined, but normally LSB of character just received Freescale Semiconductor Freescale reserves the right to change the detail specifications as may be required to permit improvements in the design of its products BIT MSB OUT 7 BIT Figure 17. SPI Slave Timing (CPHA = 0) ...

Page 48

... Fcyc 2 t prog 2 t Burst t Page t Mass 10,000 — D_ret supply. DD Typical Max Unit — 3.6 V — 3.6 V — 200 kHz s — 6. Fcyc 4 t Fcyc 4000 t Fcyc 20,000 t Fcyc — — cycles 100,000 — 100 — years Freescale Semiconductor ...

Page 49

... Characteristic 1 Regulator operating voltage 2 VREG output V input with internal VREG USB33 3 disabled 4 VREG Quiescent Current Freescale Semiconductor Freescale reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. Symbol Min Typ V 3.9 — regin V 3 3.3 ...

Page 50

... Min Max Unit 1.80 3.6 V –40 105 °C — 100 nf — 1.145 1.153 V — — 60 µV/year — 0.10 µA — 75 µA — 125 µA — 1.1 mA — 100 µV/mA 70 — dB data recorded per refo Max Unit C Notes 1.152 Freescale Semiconductor — ...

Page 51

... Figure 19. Typical VREF Output vs. Temperature Freescale Semiconductor Freescale reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. Figure 20. Typical VREF Output vs. V Electrical Characteristics DD 51 ...

Page 52

... M T — — M — — 0.1 — V/ — V/s T 0.25 — MHz T 1.6 — MHz T 80 — — 100 pF T 1.4 — k D  184 — – DD — 0.15 ± 1.0 — — — — deg T Freescale Semiconductor ...

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... Unity Gain Bandwidth (High-Speed mode Open Loop Voltage Gain 25 Load Capacitance Driving Capability Output Impedance AC Open Loop (@100 kHz 26 Low-Power mode) Freescale Semiconductor Freescale reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. 3.6 V, – – 1 Symbol Min f= 1 kHz — ...

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... Min R — OUT V 0.15 OUT 0.5 I OUT — startup T — startup f=1 kHz — – 105°C unless specified. 2 Typ Max Unit C  220 — –0.1 DD — 1.0 — — — — deg T 4 — —  250 — nV Freescale Semiconductor ...

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... MCF51MM256VLK MCF51MM256 ColdFire Microcontroller MCF51MM128VMB MCF51MM128 ColdFire Microcontroller MCF51MM128VLK MCF51MM128 ColdFire Microcontroller MCF51MM256CML MCF51MM256 ColdFire Microcontroller MCF51MM256CLL MCF51MM256 ColdFire Microcontroller MCF51MM256CMB MCF51MM256 ColdFire Microcontroller MCF51MM256CLK MCF51MM256 ColdFire Microcontroller MCF51MM128CMB MCF51MM128 ColdFire Microcontroller MCF51MM128CLK MCF51MM128 ColdFire Microcontroller 4.2 Package Information Pin Count ...

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... Updated the Orderable Part Number Summary to include the Freescale Part Number suffixes. • Completed the Package Description table values. • Changed the 80LQFP package drawing from 98ARL10530D to 98ASS23174W. Updated electrical characteristic data. • Updated with the latest characteristic data. Added several figures. Added the ADC Typical Operation table. Freescale Semiconductor ...

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Freescale reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. ...

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... Freescale Semiconductor product could create a situation where personal injury or death may occur. Should Buyer ...

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