MCIMX27MOP4A Freescale Semiconductor, MCIMX27MOP4A Datasheet
MCIMX27MOP4A
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MCIMX27MOP4A Summary of contents
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... Personal digital assistants (PDAs) and wireless PDAs This document contains information on a new product. Specifications and information herein are subject to change without notice. © Freescale Semiconductor, Inc., 2007, 2010. All rights reserved. Document Number: MCIMX27EC Rev. 1.6, 08/2010 i.MX27 and i.MX27L ...
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... ARM CPU) • Advanced power management (i.MX27/27L) — Dynamic process and temperature compensation — Multiple clock and power domains — Independent gating of power domains • Multiple communication and expansion ports 2 NOTE i.MX27 and i.MX27L Data Sheet, Rev. 1.6 Freescale Semiconductor ...
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... Note: The i.MX27L does not support the following: • ATA-6 HDD Interface • Memory Stick Pro • VPU: MPEG-4/.263/H.264 HW encoder/decoder • eMMA (PrP processing, CSC, deblock, dering) Figure 1. i.MX27/MX27L Simplified Interface Block Diagram Freescale Semiconductor NOR/NAND LCD Display Flash LCDC SLCDC ...
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... Functional Description and Application Information 1.3 Ordering Information Table 1 provides ordering information for the MAPBGA, lead-free packages. Device MCIMX27VOP4A! MCIMX27LVOP4A! MCIMX27MOP4A! MCIMX27LMOP4A! MCIMX27VJP4A MCIMX27LVJP4A MCIMX27MJP4A MCIMX27LMJP4A 1 Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not available from Freescale for ...
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... AHB-Lite IP Interface Module AITC ARM9EJ-S Interrupt Controller ARM926EJS ARM926EJ-S Freescale Semiconductor Table 2. Digital and Analog Modules Functional Grouping Connectivity The 1-Wire module provides bi-directional communication Peripheral between the ARM926EJ-S and the Add-Only-Memory EPROM (DS2502). The 1-Kbit EPROM is used to hold information about battery and communicates with the ARM926 Platform using the IP interface ...
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... I/O. This peripheral provides dedicated general-purpose pins that can be configured as either inputs or outputs. Timer The GPT is a multipurpose module used to measure intervals Peripheral or generate periodic output. i.MX27 and i.MX27L Data Sheet, Rev. 1.6 Brief Description Freescale Semiconductor Section/ Page 2.3.5/11 2.3.6/11 2.3.7/12 2.3.8/12 2.3.9/13 2 ...
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... Security The IIM provides an interface for reading—and in some cases, programming, and overriding identification and control information stored in on-chip fuse elements. Contact your Freescale Semiconductor sales office or distributor for additional information on SCC, RTIC, IIM, SAHARA2 Debug The JTAGC provides debug access to the ARM926 core, built-in self-test (BIST), and boundary scan test control ...
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... The Secure RAM provides a way of securely storing sensitive information. The Security Monitor implements the security policy, checking algorithm sequencing, and controlling the Secure State. Contact your Freescale Semiconductor sales office or distributor for additional information on SCC, RTIC, IIM, SAHARA2 Connectivity The SDHC controls the MMC (MultiMediaCard), SD (Secure ...
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... The clock must be configured to approximately 1 MHz. You can then set the 1-Wire register to send and receive bits over the 1-Wire bus. Freescale Semiconductor Functional Grouping Connectivity The i ...
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... The ARM926 co-processor, instruction TCM, and data TCM interfaces will be tied off within the ARM926 Platform and will not be available for external connection. 10 i.MX27 and i.MX27L Data Sheet, Rev. 1.6 Freescale Semiconductor ...
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... The design of the AUDMUX allows multiple simultaneous audio/voice/data flows between the ports in point-to-point or point-to-multipoint configurations. Freescale Semiconductor Functional Description and Application Information i.MX27 and i.MX27L Data Sheet, Rev. 1.6 ...
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... Frame, End of Frame, Change of Field, FIFO full • Configurable master clock frequency output to sensor • Asynchronous input logic design. Sensor master clock can be driven by either the i.MX27/MX27L processor or by external clock source. 12 i.MX27 and i.MX27L Data Sheet, Rev. 1.6 Freescale Semiconductor ...
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... In contrast with i.MX21 processor’s components, this eMMA does not include the video codec. A more powerful video codec is included as a separate module. The i.MX27L does not have a eMMA_lt module. Freescale Semiconductor Functional Description and Application Information NOTE i.MX27 and i.MX27L Data Sheet, Rev. 1.6 ...
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... RGB data and YUV data format can be generated concurrently — 32/64-bit AHB bus • Post-processor — Input data: – From system memory — Input format: – YUV 4:2:0 (IYUV, YV12) — Image Size: 32 × 2044 × 2044 14 i.MX27 and i.MX27L Data Sheet, Rev. 1.6 Freescale Semiconductor ...
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... Automatic internal flushing of the receive FIFO for runts (collision fragments) and address recognition rejects (no processor bus utilization) • Address recognition — Frames with broadcast address may be always accepted or always rejected Freescale Semiconductor Functional Description and Application Information i.MX27 and i.MX27L Data Sheet, Rev. 1.6 15 ...
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... TIN pin. The counter has two operation modes: free-run and restart mode. The GPT can work in low-power mode. 16 i.MX27 and i.MX27L Data Sheet, Rev. 1.6 Freescale Semiconductor ...
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... The IC Identification Module (IIM) provides an interface for reading and in some cases programming and/or overriding identification and control information stored in on-chip fuse elements. The module supports laser fuses (L-Fuses) or electrically-programmable poly fuses (e-Fuses) or both. Contact your Freescale Semiconductor sales office or distributor for additional information on SCC, RTIC, IIM, SAHARA2 2.3.18 ...
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... If a particular slave port is simultaneously requested by more than one master port, arbitration logic exists inside the crossbar to allow the higher priority master port to be granted the bus, while stalling the other requestor(s) until that transaction has completed. The slave port arbitration 18 i.MX27 and i.MX27L Data Sheet, Rev. 1.6 Freescale Semiconductor ...
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... NAND Flash device). After the boot procedure completes, the RAM is available as buffer RAM. In addition, the NAND Flash controller provides an X16-bit and X32-bit interface to the AHB bus on the chip side, and an X8/X16 interface to the NAND Flash device on the external side. Freescale Semiconductor Functional Description and Application Information NOTE NOTE i ...
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... TOD counters. The alarm functions, when enabled, generate RTC interrupts when the TOD settings reach programmed values. The sampling timer generates fixed-frequency interrupts, and the minute stopwatch allows for efficient interrupts on very small boundaries. 20 i.MX27 and i.MX27L Data Sheet, Rev. 1.6 Freescale Semiconductor ...
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... The Security Controller Module (SCC hardware security component. Overall, its primary functionality is associated with establishing a centralized security state controller and hardware security state with a hardware configured, unalterable security policy. Contact your Freescale Semiconductor sales office or distributor for additional information on SCC, RTIC, IIM, and SAHARA2. 2.3.32 ...
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... The SSI provides two sets of Transmit and Receive FIFOs. Each of the four FIFOs is 8 × 24 bits. The two sets of Tx/RX FIFOs can be used in Network mode to provide two independent channels for transmission 22 i.MX27 and i.MX27L Data Sheet, Rev. 1.6 Freescale Semiconductor ...
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... The USB module includes the following features: • Full Speed/Low speed Host only core (HOST 1) • Transceiverless Link Logic (TLL) for on board connection to a FS/LS USB peripheral Freescale Semiconductor Functional Description and Application Information i.MX27 and i.MX27L Data Sheet, Rev. 1.6 23 ...
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... Once the WDOG module is activated, it must be serviced by software on a periodic basis. If servicing does not take place, the timer times out. Upon a time-out, the WDOG Timer module either asserts the wdog signal or a system reset signal wdog_rst, depending on 24 i.MX27 and i.MX27L Data Sheet, Rev. 1.6 Freescale Semiconductor ...
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... Multi-format: for example, encodes MPEG-4 bitstream, and decodes H.264 bitstream simultaneously • Coding tools — High-performance motion estimation – Single reference frame for both MPEG-4 and H.264 encoding Freescale Semiconductor Functional Description and Application Information NOTE i.MX27 and i.MX27L Data Sheet, Rev. 1.6 25 ...
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... Pad Name A [13:0] Address bus signals, shared with SDRAM/MDDR, WEIM and PCMCIA, A[10] for SDRAM/MDDR is not the address but the pre-charge bank select signal. 26 Table 3. i.MX27/MX27L Signal Descriptions Function/Notes External Bus/Chip Select (EMI) i.MX27 and i.MX27L Data Sheet, Rev. 1.6 Freescale Semiconductor ...
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... NFC Command latch signal, multiplexed with ETMTRACEPKT0; PF1 NFWP_B NFC Write Permit signal, multiplexed with ETMTRACEPKT1; PF2 NFCE_B NFC Chip enable signal, multiplexed with ETMTRACEPKT2; PF3 NFRB NFC read Busy signal, multiplexed with ETMTRACEPKT3; PF0 Freescale Semiconductor Function/Notes i.MX27 and i.MX27L Data Sheet, Rev. 1.6 Signal Descriptions 27 ...
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... These are special factory test signals. To ensure proper operation, do not connect to these signals. EXTAL32K 32 kHz crystal input (Note: in the RTC power domain) XTAL32K Oscillator output to 32 kHz crystal (Note: in the RTC power domain) Power_cut (Note: in the RTC power domain) 28 Function/Notes Clocks and Resets i.MX27 and i.MX27L Data Sheet, Rev. 1.6 Freescale Semiconductor ...
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... SD3_CMD SD Command bidirectional signal. This signal is multiplexed with ETMTRACEPKT15 and also through GPIO PD1 multiplexed with FEC_TXD0. SD3_CLK SD Output Clock signal. This signal is through GPIO PD0 multiplexed with FEC_TXD1. Freescale Semiconductor Function/Notes Bootstrap JTAG Secure Digital Interface (X2) i.MX27 and i.MX27L Data Sheet, Rev. 1.6 ...
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... Master In/Slave Out signal, PD30 CSPI1_SS[2:0] Slave Select (Selectable polarity) signal, the CSPI1_SS2 is multiplexed with USBH2_DATA5/RCV; and CSPI1_SS1 is multiplexed with EXT_DMAGRANT; PD26–28. CSPI1_SCLK Serial Clock signal, PD29 30 Function/Notes UARTs (X6) Keypad PWM CSPI (X3) i.MX27 and i.MX27L Data Sheet, Rev. 1.6 Freescale Semiconductor ...
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... SSI1_FS Frame Sync signal that is output in master and input in slave; PC20 SSI2_CLK Serial clock signal that is output in master or input in slave, multiplexed with GPT4_TIN. PC27 SSI2_TXD Transmit serial data signal, multiplexed with GPT4_TOUT; PC26 Freescale Semiconductor Function/Notes CMOS Sensor Interface i.MX27 and i.MX27L Data Sheet, Rev. 1.6 ...
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... USB Host2 Direction/Transmit Data Minus signal, PA1 USBH2_CLK/TXDM USB Host2 Clock/Transmit Data Minus signal; PA0 USBOTG_DATA3/RXDP USB OTG data4/Receive Data Plus signal; multiplexed with SLCDC1_DAT15 through PC13 32 Function/Notes General Purpose Timers (X6) USB2.0 i.MX27 and i.MX27L Data Sheet, Rev. 1.6 Freescale Semiconductor ...
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... This signal is multiplexed with the SLCDC1_RS; PA25. REV Signal for common electrode driving signal preparation (Sharp panel dedicated signal). This signal is multiplexed with SLCDC1_D0; PA24. Freescale Semiconductor Function/Notes LCD Controller and Smart LCD Controller i.MX27 and i.MX27L Data Sheet, Rev. 1.6 ...
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... For RTC, SCC power supply VDD RTCVSS For RTC, SCC GND 34 Function/Notes ATA (not available on i.MX27L) Noisy I/O Supply Pins Analog Supply Pins Q Internal Power Supply VDD VDD i.MX27 and i.MX27L Data Sheet, Rev. 1.6 1 through VDD VDD VDD Freescale Semiconductor ...
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... This section discusses the multiplexing of EMI signals. The EMI signals’ multiplexing is done inside the EMI. Table 4 lists the i.MX27 pin names, pad types, and the memory devices’ equivalent pin names. Freescale Semiconductor Function/Notes should be powered up before FUSE (1.8/2.775 V), and Analog Supplies (2.775 V). See i ...
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... A24 — A25 — CE1 — CE2 — — — — — — — — — — — — — Freescale Semiconductor — — — — — — — — — — — — — — — — — — — ...
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... DQM0 ddr DQM1 ddr DQM2 ddr DQM3 ddr EB0 regular EB1 regular OE regular CS0 regular CS1 regular Freescale Semiconductor Table 4. EMI Multiplexing (continued) WEIM SDRAM PCMCIA — SD6 — SD7 — SD8 — SD9 — SD10 — SD11 — SD12 — ...
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... D15 — D14 — D13 — D12 — D11 — D10 — D9 — D8 — D7 — Freescale Semiconductor — — — — — — — — — — — — — — — — — — — ALE ...
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... PC_PWRON regular PC_VS1 regular PC_VS2 regular PC_BVD1 regular PC_BVD2 regular PC_RST regular IOIS16 regular PC_RW regular PC_POE regular M_REQUEST regular M_GRANT regular Freescale Semiconductor Table 4. EMI Multiplexing (continued) WEIM SDRAM PCMCIA D6 — D5 — D4 — D3 — D2 — D1 — D0 — — — — ...
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... Topic appears… on page 40 on page 40 on page 41 on page 42 on page 42 on page 43 Min Max –0.5 1.52 –0.5 3.3 –0.5 NV (1, 5–13) + 0.3 DD –20 125 Min Typical Max 1.2 1.3 1.52 DD 1.38 1.45 1.52 DD Freescale Semiconductor Units Units V V ...
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... Output Duty Cycle (dpdck) Output Duty Cycle (dpgdck_2) Frequency lock time (FOL mode or non-integer MF) Phase lock time Cycle-to-cycle jitter Table 9 provides information for interface frequency limits. ID Parameter 1 JTAG: TCK Frequency of Operation Freescale Semiconductor Table 7. DC Operating Conditions (continued) Symbol RTC UPLLV ...
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... Data Sheet, Rev. 1.6 Table 11. All power Value Units 266 MHz 400 MHz 133 MHz 66 MHz 32.768 kHz Symbol Typical Max Units Idd 215 260 RUN Idd 366 420 RUN Idd 11 13.5 DOZE Idd 0.9 3.5 SLEEP Idd 50 TBD PG for Freescale Semiconductor µA ...
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... Low-level output voltage High-level output current, slow slew rate High-level output current, fast slew rate Low-level output current, slow slew rate Low-level output current, fast slew rate Input Hysteresis Schmitt trigger VT+ Schmitt trigger VT- Freescale Semiconductor Table 12 for GPIO pads and Symbol Test Conditions ...
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... DDIO Min Typical Max Units — — DD_DDR –0.08 — — DD_ DDR — — 0.08 — — 0.2*NV DD_ DDR — — –3.6 –7.2 –10.8 –14.4 Freescale Semiconductor Units kΩ μA μA μA μA μA μA μA μA μA μ ...
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... Table 14. AC Electrical Characteristics of Slow General I/O Pads ID Parameter PA1 Output Pad Transition Times (Max High) Output Pad Transition Times (High) Output Pad Transition Times (Standard Drive) — Maximum Input Transition Times Note: Freescale Semiconductor Symbol Test Conditions I V =0.2* DD_DDR Normal ...
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... Min Typical Max 25 pF 0.5 0.75 1 1.0 1.45 2 0.67 1.0 1 1.3 2.0 3 1.0 1.5 2 1.95 2.9 4 2.0 2.9 4 3.9 5.9 8.4 — — — DS2502 Tx “Presence Pulse” OW2 OW3 OW4 Freescale Semiconductor Units Units ...
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... ID Parameter OW5 Write 0 Low Time OW6 Transmission Time Slot Figure 6 depicts Write 1 Sequence timing, the timing parameters. One-Wire bus (BATT_LINE) One-Wire bus (BATT_LINE) Freescale Semiconductor Symbol t RSTL t PDH t PDL t RSTH Table 18 lists the timing parameters. OW6 OW5 Figure 5. Write 0 Sequence Timing Diagram Table 18 ...
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... Table 19. Write 1/Read Timing Parameters Symbol t LOW1 t SLOT t RELEASE NOTE Symbol S rise S fall C host i.MX27 and i.MX27L Data Sheet, Rev. 1.6 Min Typical Max Units 117 120 15 — 45 Min Max — 1.25 — 1.25 — 20 Freescale Semiconductor µs µs µs Unit V/ns V/ns pF ...
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... VSYNC, then HSYNC goes high and holds for the entire line. The pixel clock is valid as long as HSYNC is high. Figure 9 and Figure 10 parameters. Freescale Semiconductor SI2 depict the gated clock mode timings of CSI, and i.MX27 and i.MX27L Data Sheet, Rev. 1.6 Electrical Characteristics SI1 ...
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... VSYNC HSYNC PIXCLK DATA[7:0] Figure 10. CSI Timing Diagram, Gated, PIXCLK—Sensor Data at Rising Edge, Latch Data at Falling Edge Valid Data Valid Data Valid Data Valid Data 3 4 i.MX27 and i.MX27L Data Sheet, Rev. 1 Valid Data Valid Data Freescale Semiconductor ...
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... In non-gated mode only, the VSYNC, and PIXCLK signals are used; the HSYNC signal is ignored. Figure 3 and Figure 4 show the different clock edge timing of CSI and Sensor in Non-Gated Mode. Table 3 is the parameter value. Figure 11 and lists the timing parameters. Freescale Semiconductor Parameter Minimum 9*T HCLK 3 ...
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... Valid Data Valid Data 2 3 Edge 1 Valid Data Valid Data 2 3 Edge Table 22. Non-Gated Clock Mode Parameters Parameter Minimum 9*T HCLK 1 i.MX27 and i.MX27L Data Sheet, Rev. 1 Valid Data Valid Data Maximum Unit — ns — ns Freescale Semiconductor ...
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... Configurable Serial Peripheral Interface (CSPI) This section describes the electrical information of the CSPI. 4.2.6.1 CSPI Timing Figure 13 and Figure 14 show the master mode and slave mode timings of CSPI, and timing parameters. Freescale Semiconductor Parameter Minimum 1 T HCLK T HCLK 0 i.MX27 and i.MX27L Data Sheet, Rev. 1.6 ...
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... MISO SSn (Input) t6’ SCLK (Input) t10 t11 MISO t12 t13 MOSI 54 t1 Figure 13. CSPI Master Mode Timing Diagram t2’ t1’ Figure 14. CSPI Slave Mode Timing Diagram i.MX27 and i.MX27L Data Sheet, Rev. 1 t7’ t5’ t3’ Freescale Semiconductor Table 23 ...
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... CSPI clock period sclk Wait time as per the Sample Period Control Register value. wait CSPI reference baud rate clock period (PERCLK2) per CSPI main clock IPG_CLOCK period ipg Freescale Semiconductor Table 23. CSPI Interface Timing Parameters Symbol t clko t clkoH t clkoL t clki t clkiH t ...
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... Data written to External device NOTE: Assuming worst case that the data is read/written from/to external device as per the above waveform. Figure 16. Timing Diagram of Safe Maximums for External Request De-Assertion 56 t max_req_assert t max_read i.MX27 and i.MX27L Data Sheet, Rev. 1.6 t min_assert t max_write Freescale Semiconductor ...
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... FEC_RXD[3:0] (inputs) FEC_RX_DV FEC_RX_ER Table 25. MII Receive Signal Timing Parameters ID M1 FEC_RXD[3:0], FEC_RX_DV, FEC_RX_ER to FEC_RX_CLK setup M2 FEC_RX_CLK to FEC_RXD[3:0], FEC_RX_DV, FEC_RX_ER hold M3 FEC_RX_CLK pulse width high Freescale Semiconductor Table 24. DMAC Timing Parameters WCS 8hclk+8.6 9hclk–20.66 8hclk–6.21 3hclk–5.87 Table Figure 17. MII Receive Signal Timing Diagram ...
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... FEC_TX_EN, FEC_TX_CLK, and FEC_TXD0 have the same timing in 10 Mbps 7-wire interface mode Parameter Table 26 lists the timing parameters Parameter i.MX27 and i.MX27L Data Sheet, Rev. 1.6 Min Max Unit 35% 65% FEC_RX_CLK period M8 Min Max Unit 5 — ns — 35% 65% FEC_TX_CLK period 35% 65% FEC_TX_CLK period Freescale Semiconductor ...
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... MDC frequency of 15 MHz. Figure 20 shows the MII serial management channel timings, and FEC_MDC (output) FEC_MDIO (output) FEC_MDIO (input) Figure 20. MII Serial Management Channel Timing Diagram Freescale Semiconductor Table 27 M9 Parameter M14 M12 M13 i.MX27 and i.MX27L Data Sheet, Rev. 1.6 Electrical Characteristics lists the timing parameters ...
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... FEC_MDC period 40% 60% FEC_MDC period Figure 21 shows the timing of the IC6 3.0 V +/–0.30 V Max Min Max 100 0 100 — 111.1 — 69.7 0 72.3 — 1.76 — — 68.3 — — 335.1 — — 111.1 — Freescale Semiconductor Unit kHz ...
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... Tck (input) TCK (input) Data (inputs) Data (outputs) Data (outputs) Data (outputs) Freescale Semiconductor Table Figure 22. Test Clock Input Timing Diagram Input Data Valid J6 Output Data Valid J7 J6 Output Data Valid Figure 23. Boundary Scan Timing Diagram i.MX27 and i.MX27L Data Sheet, Rev. 1.6 ...
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... Figure 24. Test Access Port (TAP) Diagram J13 J12 Figure 25. TRST Timing Diagram Table 30. JTAGC Timing Parameters Parameter 1 i.MX27 and i.MX27L Data Sheet, Rev. 1.6 J9 All Frequencies Unit Min Max 30.08 — ns 15.04 — ns — 2.0 ns 3.5 — ns 16.0 — ns Freescale Semiconductor ...
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... Figure 27 depict the timings of the LCDC, and parameters. T5 FLM Line 1 Line LSCLK Figure 26. LCDC Non-TFT Mode Timing Diagram Freescale Semiconductor Parameter Table 31 i.MX27 and i.MX27L Data Sheet, Rev. 1.6 Electrical Characteristics All Frequencies Unit Min Max — 25.0 ns — 25.0 ns 3.5 — ...
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... Description Pixel Clock period HSYNC width LD setup time LD hold time i.MX27 and i.MX27L Data Sheet, Rev. 1.6 Min Max Unit 22.5 1000 — — — — — T Line n Line 1 T6 Min Ma Unit 22.5 1000 — — — — — T Freescale Semiconductor ...
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... The i.MX27L does not contain an MSHC module. MSHC_SCLK MSHC_BS MSHC_DATA (Output) MSHC_DATA (Input) Figure 28. Transfer Operation Timing Diagram (Serial) Freescale Semiconductor show the MSHC timings. Table 33 NOTE tSCLKc tBSsu tDsu i.MX27 and i.MX27L Data Sheet, Rev. 1.6 Electrical Characteristics and ...
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... Figure 30. MSHC_CLK Timing Diagram Table 33. Serial Interface Timing Parameters Parameter Symbol tSCLKc tSCLKwh tSCLKwl tSCLKr tSCLKf i.MX27 and i.MX27L Data Sheet, Rev. 1.6 tBSh tDh tSCLKwl tSCLKf Standards Unit Min. Max. 50 — — — ns — — Freescale Semiconductor ...
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... The user should compare the parameters of the selected NAND Flash memory with the NFC external timing parameters to determine the proper NFC clock. The maximum NFC clock allowed is 66 MHz. It should also be noted that the default NFC clock on power up is 16.63 MHz. Freescale Semiconductor Parameter Symbol ...
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... Figure 32. Address Latch Cycle Timing Diagram 68 NF1 NF2 NF3 NF4 NF5 NF6 NF7 NF8 NF9 command NF1 NF4 NF3 NF5 NF6 NF7 NF8 NF9 Address Time it takes for SW to issue the next address command i.MX27 and i.MX27L Data Sheet, Rev. 1.6 Address Freescale Semiconductor ...
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... Parameter Symbol NF1 NFCLE Setup Time NF2 NFCLE Hold Time NF3 NFCE Setup Time NF4 NFCE Hold Time NF5 NF_WP Pulse Width Freescale Semiconductor NF1 NF3 NF10 NF11 NF5 NF6 NF8 NF9 Data to Flash Figure 33. Write Data Latch Timing Diagram NF14 ...
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... Data Sheet, Rev. 1.6 NFC clock 33.25 MHz Max Min Max 45 — — — — — — 30 — 120 — — 60 — — — 0 Freescale Semiconductor Unit — ns — ns — ns — ns — ns — ns — ns — ns — ns — ns — ns — ns ...
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... HWDATA HREADY HRESP A[25:0] D[15:0] WAIT REG OE/WE/IORD/IOWR CE1/CE2 RD/WR POE Figure 35. Write Accesses Timing Diagram—PSHT=1, PSST=1 Freescale Semiconductor ADDR 1 CONTROL 1 DATA write 1 OKAY ADDR 1 DATA write 1 REG PSST i.MX27 and i.MX27L Data Sheet, Rev. 1.6 Electrical Characteristics Table 36 lists the timing parameters. ...
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... PCMCIA strobe hold time PSST PCMCIA strobe set up time PSL PCMCIA strobe length 72 ADDR 1 CONTROL 1 OKAY ADDR 1 REG PSST Parameter i.MX27 and i.MX27L Data Sheet, Rev. 1.6 DATA read 1 OKAY OKAY PSHT PSL Min Max Unit 0 63 clock 1 63 clock 1 128 clock Freescale Semiconductor ...
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... ID SD1 SDRAM clock high-level width SD2 SDRAM clock low-level width SD3 SDRAM clock cycle time SD4 CS, RAS, CAS, WE, DQM, CKE setup time SD5 CS, RAS, CAS, WE, DQM, CKE hold time Freescale Semiconductor Figure 40, Figure 41, and Figure 42 SD4 SD5 SD4 SD5 SD5 SD7 ...
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... Parameter NOTE Table 37 indicates SDRAM requirements. All output signals i.MX27 and i.MX27L Data Sheet, Rev. 1.6 Symbol Min Max tAS 2.0 — tAH 1.8 — tAC — 6.47 tOH 1.8 — tRC 10 — Freescale Semiconductor Unit clock ...
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... CS, RAS, CAS, WE, DQM, CKE setup time SD5 CS, RAS, CAS, WE, DQM, CKE hold time SD6 Address setup time SD7 Address hold time SD11 Precharge cycle period SD12 Active to read/write command delay Freescale Semiconductor SD1 SD3 SD11 SD5 SD12 SD7 ROW / BA Parameter 1 1 i.MX27 and i.MX27L Data Sheet, Rev. 1.6 ...
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... Table 39. SDRAM Refresh Timing Parameters Symbol i.MX27 and i.MX27L Data Sheet, Rev. 1.6 Symbol Min Max tDS 2.0 — tDH 1.3 — SD1 SD2 SD3 SD10 ROW/BA Min Max tCH 3.4 4.1 tCL 3.4 4.1 Freescale Semiconductor Unit ns ns Unit ns ns ...
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... The timing parameters are similar to the ones used in SDRAM data sheets—that is, are driven by the ESDCTL at the negative edge of SDCLK and the parameters are measured at maximum memory frequency. Freescale Semiconductor Symbol 1 1 NOTE Table 39 indicates SDRAM requirements ...
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... The clock continues to run unless both CKEs are low. Then the clock is stopped in low state. Table 40. SDRAM Self-Refresh Cycle Timing Parameters ID SD16 CKE output delay time 78 SD16 NOTE Parameter Symbol i.MX27 and i.MX27L Data Sheet, Rev. 1.6 SD16 Min Max tCKS 1.8 — Freescale Semiconductor Unit ns ...
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... The timing parameters are similar to the ones used in SDRAM data sheets—that is, are driven by the ESDCTL at the negative edge of SDCLK and the parameters are measured at maximum memory frequency. Freescale Semiconductor SD18 SD17 SD17 Data Data ...
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... Table 43. SDHC Electrical DC Characteristics Min Max –0 0.3 DD –10 10 –10 10 i.MX27 and i.MX27L Data Sheet, Rev. 1.6 Data Data Data Data Symbol Min Max Unit tDQSQ tQH 2.3 tDQSCK Unit Comments V — μA — μA — Freescale Semiconductor Data — 0.85 ns — ns — 6.7 ns ...
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... SD24 Input LOW Voltage Push-Pull Signal Levels (Low Voltage) SD25 Output HIGH Voltage SD26 Output LOW Voltage SD27 Input HIGH Voltage SD28 Input LOW Voltage Freescale Semiconductor Table 43. SDHC Electrical DC Characteristics Min Max 1.65 1.95 2.7 3.6 — 250 100 — ...
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... This diagram illustrates the timing when the SCKPOL = 0, CSPOL = 1 i.MX27 and i.MX27L Data Sheet, Rev. 1.6 Table 44 and Table 45 list the timing tcsh tcl tch tdh trsh LSB tcsh tcl tch tdh trsh LSB tcsh tcl tch trsh tdh LSB tcsh tcl tch tdh trsh LSB Freescale Semiconductor ...
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... LCD_RS LCD_CS LCD_DATA[15:0] Figure 44. SLCDC Timing Diagram—Parallel Transfers to LCD Device Table 45. SLCDC Parallel Interface Timing Parameters Symbol Parameter t Parallel clock cycle time cyc t Data setup time ds t Data hold time dh Freescale Semiconductor Min ± cyc prop ± cyc prop ± ...
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... SS1 SS5 SS4 SS8 SS6 SS10 SS16 SS43 SS42 i.MX27 and i.MX27L Data Sheet, Rev. 1.6 Typical Max Units — — — — — — Table 46 lists the timing SS3 SS12 SS14 SS15 SS18 SS17 SS19 Freescale Semiconductor ...
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... Internal FS rise time SS15 (Tx/Rx) Internal FS fall time SS16 (Tx) CK high to STXD valid from high impedance SS17 (Tx) CK high to STXD high/low SS18 (Tx) CK high to STXD high impedance SS19 STXD rise/fall time Freescale Semiconductor SS1 SS5 SS4 SS8 SS6 SS10 SS16 SS43 SS42 Parameter i ...
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... Figure 47. SSI Receiver with Internal Clock Timing Diagram 86 Parameter SS1 SS5 SS4 SS9 SS11 SS20 SS51 SS47 SS50 i.MX27 and i.MX27L Data Sheet, Rev. 1.6 Min Max Unit 10.0 — — ns — Table 47 lists the timing SS3 SS13 SS21 SS49 Freescale Semiconductor ...
Page 87
... CK high to FS (wl) high SS13 (Rx) CK high to FS (wl) low SS20 SRXD setup time before (Rx) CK low SS21 SRXD hold time after (Rx) CK low SS47 Oversampling clock period SS48 Oversampling clock high period Freescale Semiconductor SS1 SS5 SS4 SS7 SS9 SS11 SS20 SS47 SS51 SS50 ...
Page 88
... Figure 49. SSI Transmitter with External Clock Timing Diagram 88 Parameter NOTE SS22 SS25 SS26 SS27 SS29 SS31 SS37 SS44 i.MX27 and i.MX27L Data Sheet, Rev. 1.6 Min Max Unit — — ns — Table 48 lists the timing SS24 SS33 SS39 SS38 SS45 SS46 Freescale Semiconductor ...
Page 89
... SS38 (Tx) CK high to STXD high/low SS39 (Tx) CK high to STXD high impedance SS44 SRXD setup before (Tx) CK falling SS45 SRXD hold after (Tx) CK falling SS46 SRXD rise/fall time Freescale Semiconductor SS22 SS26 SS25 SS27 SS29 SS31 SS37 SS44 Parameter External Clock Operation Synchronous External Clock Operation i ...
Page 90
... SS28 AD1_TXFS (bl) (Input) AD1_TXFS (wl) (Input) AD1_RXD (Input) Figure 51. SSI Receiver with External Clock Timing Diagram 90 NOTE SS22 SS26 SS25 SS30 SS32 SS35 SS40 i.MX27 and i.MX27L Data Sheet, Rev. 1.6 Table 49 lists the timing SS24 SS34 SS41 SS36 Freescale Semiconductor ...
Page 91
... CK high to FS (wl) low SS35 (Tx/Rx) External FS rise time SS36 (Tx/Rx) External FS fall time SS40 SRXD setup time before (Rx) CK low SS41 SRXD hold time after (Rx) CK low Freescale Semiconductor SS22 SS26 SS25 SS30 SS32 SS35 SS40 Parameter External Clock Operation 81 ...
Page 92
... Input data, ECB and DTACK all captured according to BCLK rising edge time. WEIM module, and Table 50 lists the timing parameters. 92 NOTE i.MX27 and i.MX27L Data Sheet, Rev. 1.6 Figure 53 shows the timing of the Freescale Semiconductor ...
Page 93
... BCLK (for rising edge timing) Input Data ID WE1 Clock fall to address valid WE2 Clock rise/fall to address invalid WE3 Clock rise/fall to CS[x] valid WE4 Clock rise/fall to CS[x] invalid Freescale Semiconductor WEIM Outputs Timing WE22 WE21 WE1 WE3 WE5 WE7 WE9 WE11 WE13 ...
Page 94
... Freescale Semiconductor ...
Page 95
... DATA Figure 54. Asynchronous Memory Timing Diagram for BCLK Last Valid Address ADDR CS[x] RW LBA OE EB[y] DATA Figure 55. Asynchronous Memory Timing Diagram for Write Access—WSC=1, EBWA=1, EBWN=1, LBN=1 Freescale Semiconductor Figure 57, Figure 58, and Figure 59 WE1 V1 WE3 WE11 WE7 WE9 WE15 Read Access—WSC=1 ...
Page 96
... WE16 V1 V1+2 Halfword Halfword WE15 WE15 Read Accesses: WSC=2, SYNC=1, DOL=0 Address V1 WE12 WE18 WE17 WE14 V1+4 V1 WE13 i.MX27 and i.MX27L Data Sheet, Rev. 1.6 Address V2 WE4 WE8 WE10 V2 V2+2 Halfword Halfword WE2 WE4 WE6 WE10 WE14 V1+8 V1+12 Freescale Semiconductor ...
Page 97
... WE3 CS[x] RW LBA OE WE9 EB[y] Figure 59. Muxed A/D Mode Timing Diagram for Asynchronous Read Access—WSC=7, LBA=1, LBN=1, LAH=1, OEA=7 4.3.12.1 WEIM Synchronous Mode Sample Point Freescale Semiconductor WE2 Address V1 WE13 Write WE12 WE2 Address V1 WE11 WE12 WE7 i.MX27 and i.MX27L Data Sheet, Rev. 1.6 ...
Page 98
... AHB first sample point is the time marker A. HCLK HTRANS NONSEQ HWRITE V1 HADDR HREADY RDATA BCLK ADDR Last Valid Addr CS0 OEA LBA RW EB DATA_IN ECB Figure 60. FCE=0,SYNC=1,BCD=1,WSC=4,BCS=0,CSA=0,OEA SEQ Addr0 RD0 RD1 i.MX27 and i.MX27L Data Sheet, Rev. 1 WORD1 WORD2 RD3 RD2 Freescale Semiconductor ...
Page 99
... AHB first sample point is the time marker A HCLK HTRANS NONSEQ HWRITE V1 HADDR HREADY RDATA BCLK ADDR Last Valid Addr CS0 OEA LBA RW EB DATA_IN ECB Figure 61. FCE=0,SYNC=1,BCD=1,WSC=6,BCS=0,CSA=0,OEA=0 Freescale Semiconductor A SEQ Addr0 RD0 i.MX27 and i.MX27L Data Sheet, Rev. 1.6 Electrical Characteristics WORD1 WORD2 RD1 RD3 RD2 99 ...
Page 100
... AHB first sample point is the time marker A. HCLK HTRANS NONSEQ HWRITE V1 HADDR HREADY RDATA BCLK ADDR Last Valid Addr CS0 OEA LBA RW EB DATA_IN ECB Figure 62. FCE=0,SYNC=1,BCD=1,WSC=8,BCS=0,CSA=0,OEA=0 100 SEQ Addr0 i.MX27 and i.MX27L Data Sheet, Rev. 1 WORD1 RD0 RD1 RD3 RD2 Freescale Semiconductor WOR ...
Page 101
... CS0 OEA LBA RW EB DATA_IN ECB Figure 63. FCE=0,SYNC=1,BCD=1,WSC=4,BCS=0,CSA=0, OEA=0 4.3.13 USBOTG Electricals This section describes the electrical information of the USB OTG port and host ports. Freescale Semiconductor B A SEQ Addr0 RD0 RD1 i.MX27 and i.MX27L Data Sheet, Rev. 1.6 Electrical Characteristics C D ...
Page 102
... Transmit enable, active low Out • TX data when USB_TXOE_B is low In • Differential RX data when USB_TXOE_B is high Out • SE0 drive when USB_TXOE_B is low In • SE0 RX indicator when USB_TXOE_B is high i.MX27 and i.MX27L Data Sheet, Rev. 1.6 USB_DAT_VP USB_SE0_VM USB_TXOE_B USB_DAT_VP USB_SE0_VM Freescale Semiconductor ...
Page 103
... USB_DAT_VP RX Rise/Fall Time USB_SE0_VM 4.3.14.2 DAT_SE0 Unidirectional Mode Table 53. Signal Definitions—DAT_SE0 Unidirectional Mode Name USB_TXOE_B USB_DAT_VP USB_SE0_VM USB_VP1 USB_VM1 USB_RCV Figure 66. USB Transmit Waveform in DAT_SE0 Unidirectional Mode Freescale Semiconductor Direction Min Out — Out — Out — Out 49.0 In — In — ...
Page 104
... Out (Tx) • data when USB_TXOE_B low In (Rx) • data when USB_TXOE_B high In • Differential RX data i.MX27 and i.MX27L Data Sheet, Rev. 1.6 USB_DAT_VP/ USB_SE0_VM VP, VM, RCV Condition/ Max Unit Reference Signal 51.0 % — 8.0 ns USB_TXOE_B 10.0 ns USB_TXOE_B Freescale Semiconductor ...
Page 105
... Figure 68. USB Transmit Waveform in VP_VM Bidirectional Mode Figure 69. USB Receive Waveform in VP_VM Bidirectional Mode Freescale Semiconductor USB_SE0_VM i.MX27 and i.MX27L Data Sheet, Rev. 1.6 Electrical Characteristics USB_TXOE_B USB_DAT_VP USB_SE0_VM USB_TXOE_B USB_DAT_VP USB_SE0_VM USB_SE0_VM 105 ...
Page 106
... RX VP data when USB_TXOE_B is high data when USB_TXOE_B is high In Differential RX data i.MX27 and i.MX27L Data Sheet, Rev. 1.6 Condition/ Max Unit Reference Signal 51.0 % — — ns USB_DAT_VP 0.0 ns USB_DAT_VP 8.0 ns USB_TXOE_B 10.0 ns USB_TXOE_B 3 3 +4.0 ns USB_SE0_VM +2.0 ns USB_DAT_VP Freescale Semiconductor ...
Page 107
... Figure 70. USB Transmit Waveform in VP_VM Unidirectional Mode Figure 71. USB Receive Waveform in VP_VM Unidirectional Mode Freescale Semiconductor USB_SE0_VM i.MX27 and i.MX27L Data Sheet, Rev. 1.6 Electrical Characteristics USB_TXOE_B USB_DAT_VP USB_SE0_VM USB_TXOE_B USB_VP1 USB_VM1 UH1_RXD 107 ...
Page 108
... Data Sheet, Rev. 1.6 Max Unit Reference Signal — 5.0 ns — 5.0 ns — 5.0 ns 51.0 % 0.0 — ns — 0.0 ns — 8.0 ns USB_TXOE_B — 10.0 ns USB_TXOE_B — 3.0 ns — 3.0 ns +4.0 ns USB_SE0_VM +2.0 ns Freescale Semiconductor Conditions — USB_DAT_VP USB_DAT_VP USB_DAT_VP ...
Page 109
... Full Package Outline Drawing (17 mm Figure 72 shows the package drawings and dimensions of the production package. Figure 72. i.MX27/MX27L 17 mm × Full Package MAPBGA: Mechanical Drawing Freescale Semiconductor i.MX27 and i.MX27L Data Sheet, Rev. 1.6 Package Information and Pinout × 17 mm) 109 ...
Page 110
... Please refer to Table 3 for complete information on the signal multiplexing schemes of these signals. 110 Table 59 are multiplexed with other signals. For ease of reference, all i.MX27 and i.MX27L Data Sheet, Rev. 1.6 Freescale Semiconductor ...
Page 111
... CSI_HSYNC_ TIN_PC15 UART5_RTS_PB21 CSI_D5_PB17 CSI_D7_UART5 _RXD_PB19 CSI_D3_UART6_ CSI_MCLK_PB15 RTS_PB13 SD2_CLK_MSHC CSI_D1_UART6 _SCLK_PB9 _RXD_PB11 SD2_D3_MSHC SPL_SPR_PA27 _DATA3_PB7 GND GND Freescale Semiconductor USBH1_OE_B_PB27 USBH1_TXDP_UART4 GND _CTS_PB29 CSPI2_SS1_USBH2 CSPI2_SCLK_USBH2 GND _DATA3_PD2 _DATA0_PD22 CSPI2_SS2_USBH2 _DATA4_PD19 CSPI1_MOSI_PD31 CSPI1_SS1_PD27 TMS TDI TRST_B UART1_RTS_PE15 _PE8 PWMO_PE5 ...
Page 112
... Data Sheet, Rev. 1.6 USBH2_DATA7 USBOTG_CLK _PA2 _PE24 USBH2_STP_PA4 USBH2_DIR_PA1 I2C2_SDA_PC5 USBH1_RXDM USBOTG_DATA3 _PB30 _PC13 USBOTG_DATA0 RTCVDD _PC9 UPLLVDD RTCVSS GND GND GND GND GND GND LD11_PA17 LD9_PA15 LD5_PA11 LD1_PA7 LD7_PA13 LD3_PA9 LD2_PA8 LD0_PA6 LSCLK_PA5 NFWP_B_ NFALE_ETMPIPE ETMTRACEPKT1_PF2 STAT0_PF4 Freescale Semiconductor ...
Page 113
... NVDD13 NVDD7 FPMVDD GND UPLLVSS GND GND GND GND GND NVDD12 NVDD1 NFCLE_ETMTRAC EPKT0_PF1 NFRE_B_ETMPIP ESTAT1_PF5 NFCE_B_ETMTRACE PKT2_PF3 NFWE_B_ETMPIPE STAT2_PF6 Freescale Semiconductor XTAL32K SD3_CLK_ETMTRACE PKT15_PD1 OSC32VSS SD3_CMD_PD0 POWER_CUT USBOTG_DIR_KP ATA_DATA2_SD3 _ROW7A_PE2 POWER_ON_RESET ATA_DATA6_FEC _MDIO_PD8 NVDD6 GND GND GND GND GND GND ...
Page 114
... PC_BVD2_ATA _DMACK_PF11 PC_VS2_ATA PC_PWRON_ATA _DA0_PF13 _DA2_PF16 PC_CD1_B_ATA PC_WAIT_B_ATA _DIOR_PF20 _CS1_PF18 EXT_60M OE_B EB0_B LBA_B CS5_B_ETMTRACE CS2_B CLK_PF22 CS3_B SDCKE1 SDWE_B DQM2 DQM1 SD2 A16 A15 SD6 SD8 SD13 SD12 SDQS1 SD15 SD25 SD18 SDQS2 A20 SD23 SDQS3 A2 SDBA0 A4 A0 Freescale Semiconductor ...
Page 115
... RESET_B_PF10 CLKMODE0 PC_VS1_ATA _DA1_PF14 PC_CD2_B_ATA _DIOW_PF19 JTAG_CTRL BCLK CS1_B RAS_B SD0 A14 SD10 SD21 A21 SD27 A24 SD24 SD30 A23 Freescale Semiconductor GND GND GND GND POR_B PC_RW_B_ATA _IORDY_PF8 PC_BVD1_ATA _DMARQ_PF12 PC_READY_ATA _CS0_PF17 EXT_266M EB1_B CLKO_PF15 ECB_B CS0_B RW_B CS4_B_ETMTRACE SYNC_PF21 ...
Page 116
... A16 A17 A18 A19 A2 A20 A21 A22 A23 A24 A25 ATA_DATA0_SD3_D0_PD2 ATA_DATA1_SD3_D1_PD3 ATA_DATA10_ETMTRACEPKT9_PD12 ATA_DATA11_ETMTRACEPKT8_PD13 ATA_DATA12_ETMTRACEPKT7_PD14 i.MX27 and i.MX27L Data Sheet, Rev. 1.6 Location Y1 T6 AC12 AB9 Y11 W11 AC7 AC6 AB4 AC3 AB1 AA2 R23 R24 R20 W23 U23 Freescale Semiconductor ...
Page 117
... Table 60. i.MX27 BGA (17 mm × 17 mm)— Contact Name Listing (continued) Freescale Semiconductor Contact Name ATA_DATA13_ETMTRACEPKT6_PD15 ATA_DATA14_ETMTRACEPKT5_PD16 ATA_DATA15_ETMTRACEPKT4_PF23 ATA_DATA2_SD3_D2_PD4 ATA_DATA3_SD3_D3_PD5 ATA_DATA4_ETMTRACEPKT14_PD6 ATA_DATA5_ETMTRACEPKT13_PD7 ATA_DATA6_FEC_MDIO_PD8 ATA_DATA7_ETMTRACEPKT12_PD9 ATA_DATA8_ETMTRACEPKT11_PD10 ATA_DATA9_ETMTRACEPKT10_PD11 AVDD AVSS BCLK BOOT0 BOOT1 BOOT2 BOOT3 CAS_B CLKMODE0 CLKMODE1 CLKO_PF15 CLS_PA25 CONTRAST_PA30 CS0_B CS1_B ...
Page 118
... CSPI1_RDY_PD25 CSPI1_SCLK_PD29 CSPI1_SS0_PD28 CSPI1_SS1_PD27 CSPI1_SS2_USBH2_DATA5_PD26 CSPI2_MISO_USBH2_DATA2_PD23 CSPI2_MOSI_USBH2_DATA1_PD24 CSPI2_SCLK_USBH2_DATA0_PD22 CSPI2_SS0_USBH2_DATA6_PD21 CSPI2_SS1_USBH2_DATA3_PD20 CSPI2_SS2_USBH2_DATA4_PD19 D0 D1 D10 D11 D12 D13 D14 D15 i.MX27 and i.MX27L Data Sheet, Rev. 1.6 Location A22 C21 B21 F18 B22 C20 E22 G20 E23 D23 F20 C23 D22 Freescale Semiconductor ...
Page 119
... Table 60. i.MX27 BGA (17 mm × 17 mm)— Contact Name Listing (continued) Freescale Semiconductor Contact Name DQM0 DQM1 DQM2 DQM3 EB0_B EB1_B ECB_B EXT_266M EXT_60M EXTAL26M EXTAL32K FPMVDD FPMVSS FUSEVDD FUSEVSS GND GND GND GND GND GND GND GND GND GND GND ...
Page 120
... Data Sheet, Rev. 1.6 Location B2 B23 B24 K10 K11 K12 K13 K14 K15 L10 L11 L12 L13 L14 L15 M10 M11 M12 M13 M14 N10 N11 N12 N13 N14 N15 P10 P11 P12 P13 P14 R10 R11 Freescale Semiconductor ...
Page 121
... Table 60. i.MX27 BGA (17 mm × 17 mm)— Contact Name Listing (continued) Freescale Semiconductor Contact Name GND GND GND HSYNC_PA28 I2C_CLK_PD18 I2C_DATA_PD17 I2C2_SCL_PC6 I2C2_SDA_PC5 IOIS16_ATA_INTRQ_PF9 JTAG_CTRL KP_COL0 KP_COL1 KP_COL2 KP_COL3 KP_COL4 KP_COL5 KP_ROW0 KP_ROW1 KP_ROW2 KP_ROW3 KP_ROW4 KP_ROW5 LBA_B LD0_PA6 LD1_PA7 LD10_PA16 ...
Page 122
... MPLLVDD MPLLVSS NFALE_ETMPIPESTAT0_PF4 NFCE_B_ETMTRACEPKT2_PF3 NFCLE_ETMTRACEPKT0_PF1 NFRB_ETMTRACEPKT3_PF0 NFRE_B_ETMPIPESTAT1_PF5 NFWE_B_ETMPIPESTAT2_PF6 NFWP_B_ETMTRACEPKT1_PF2 NVDD1 NVDD1 NVDD10 NVDD11 NVDD12 NVDD13 NVDD14 NVDD15 NVDD2 NVDD2 NVDD2 NVDD2 NVDD2 NVDD3 i.MX27 and i.MX27L Data Sheet, Rev. 1.6 Location T18 R15 G11 G10 L7 M19 H18 V10 V9 V11 Freescale Semiconductor ...
Page 123
... Table 60. i.MX27 BGA (17 mm × 17 mm)— Contact Name Listing (continued) Freescale Semiconductor Contact Name NVDD3 NVDD4 NVDD5 NVDD5 NVDD6 NVDD6 NVDD7 NVDD7 NVDD8 NVDD9 OE_ACD_PA31 OE_B OSC26M_TEST OSC26VDD OSC26VSS OSC32K_BYPASS OSC32VDD OSC32VSS PC_BVD1_ATA_DMARQ_PF12 PC_BVD2_ATA_DMACK_PF11 PC_CD1_B_ATA_DIOR_PF20 PC_CD2_B_ATA_DIOW_PF19 PC_POE_ATA_BUFFER_EN_PF7 PC_PWRON_ATA_DA2_PF16 PC_READY_ATA_CS0_PF17 PC_RST_ATA_RESET_B_PF10 ...
Page 124
... SD15 SD16 SD17 i.MX27 and i.MX27L Data Sheet, Rev. 1.6 Location D2 C13 G12 G13 G16 P7 V14 V15 V16 AB13 AC22 AA22 E1 A19 K19 K18 AC15 AB12 AC11 G17 A21 A20 E17 B20 E18 AB8 AD7 Y9 W9 AD6 Y8 AD5 AC5 Freescale Semiconductor ...
Page 125
... Table 60. i.MX27 BGA (17 mm × 17 mm)— Contact Name Listing (continued) Freescale Semiconductor Contact Name SD18 SD19 SD2 SD2_CLK_MSHC_SCLK_PB9 SD2_CMD_MSHC_BS_PB8 SD2_D0_MSHC_DATA0_PB4 SD2_D1_MSHC_DATA1_PB5 SD2_D2_MSHC_DATA2_PB6 SD2_D3_MSHC_DATA3_PB7 SD20 SD21 SD22 SD23 SD24 SD25 SD26 SD27 SD28 SD29 SD3 SD3_CLK_ETMTRACEPKT15_PD1 SD3_CMD_PD0 SD30 SD31 SD4 SD5 ...
Page 126
... SSI3_RXDAT_SLCDC2_RS_PC29 SSI3_TXDAT_SLCDC2_CS_PC30 SSI4_CLK_PC19 SSI4_FS_PC16 SSI4_RXDAT_PC17 SSI4_TXDAT_PC18 TCK TDI TDO TIN_PC15 TMS TOUT_PC14 TRST_B UART1_CTS_PE14 i.MX27 and i.MX27L Data Sheet, Rev. 1.6 Location Y14 AD13 AD14 AD9 W13 B10 G9 A10 F10 B11 E10 A11 F17 B18 E16 B7 B19 E8 C17 A18 Freescale Semiconductor ...
Page 127
... Table 60. i.MX27 BGA (17 mm × 17 mm)— Contact Name Listing (continued) Freescale Semiconductor Contact Name UART1_RTS_PE15 UART1_RXD_PE13 UART1_TXD_PE12 UART2_CTS_KP_COL7_PE3 UART2_RTS_KP_ROW7_PE4 UART2_RXD_KP_ROW6_PE7 UART2_TXD_KP_COL6_PE6 UART3_CTS_PE10 UART3_RTS_PE11 UART3_RXD_PE9 UART3_TXD_PE8 UPLLVDD UPLLVSS USB_OC_B_PB24 USB_PWR_PB23 USBH1_FS_UART4_RTS_PB26 USBH1_OE_B_PB27 USBH1_RCV_PB25 USBH1_RXDM_PB30 USBH1_RXDP_UART4_RXD_PB31 USBH1_SUSP_PB22 USBH1_TXDM_UART4_TXD_PB28 USBH1_TXDP_UART4_CTS_PB29 USBH2_CLK_PA0 USBH2_DATA7_PA2 USBH2_DIR_PA1 ...
Page 128
... Table 60. i.MX27 BGA (17 mm × 17 mm)— Contact Name Listing (continued) 128 Contact Name USBOTG_DATA4_PC12 USBOTG_DATA5_PC7 USBOTG_DATA6_PC8 USBOTG_DATA7_PE25 USBOTG_DIR_KP_ROW7A_PE2 USBOTG_NXT_KP_COL6A_PE0 USBOTG_STP_KP_ROW6A_PE1 VSYNC_PA29 XTAL26M XTAL32K i.MX27 and i.MX27L Data Sheet, Rev. 1.6 Location H24 H19 G24 M22 N20 M20 L23 F5 AA24 N24 Freescale Semiconductor ...
Page 129
... Full Package Outline Drawing (19 mm Figure 73 shows the package drawings and dimensions of the production package. Figure 73. i.MX27/MX27L 19 × Full Package MAPBGA: Mechanical Drawing Freescale Semiconductor i.MX27 and i.MX27L Data Sheet, Rev. 1.6 Package Information and Pinout × 19 mm) 129 ...
Page 130
... Refer to for complete information on the signal multiplexing schemes of these signals. 130 Table 62 are multiplexed with other signals. For ease of reference, all i.MX27 and i.MX27L Data Sheet, Rev. 1.6 Table 3 Freescale Semiconductor ...
Page 131
... CSI_D5_PB17 CSI_PIXCLK _PB16 CSI_MCLK CSI_D2_UART6_ _PB15 CTS_PB12 CSI_D1_UART6 SD2_CMD_MSHC _RXD_PB11 _BS_PB8 SD2_D3_MSHC SD2_D1_MSHC_ _DATA3_PB7 DATA1_PB5 GND GND GND GND Freescale Semiconductor CSPI2_SS0_USBH2 CSPI2_MOSI_USBH2 _DATA6_PD21 _DATA1_PD24 CSPI2_SS1_USBH2 CSPI2_SCLK_USBH2 _DATA3_PD20 _DATA0_PD22 CSPI1_SS1 CSPI2_SS2_USBH2 _PD27 _DATA4_PD19 CSPI1_MOSI CSPI1_SS2_USBH2 _PD31 _DATA5_PD26 SD1_CLK_CSPI3_ CSPI1_SCLK SCLK_PE23 ...
Page 132
... NVDD7 NVDD13 UPLLVDD UPLLVSS QVDD QVDD GND GND GND GND GND GND GND GND GND GND GND GND GND GND QVDD QVDD NVDD1 NVDD1 NVDD1 NVDD1 LSCLK_PA5 NFCLE_ ETMTRACEPKT0_PF1 NFCE_B_ NFRE_B_ ETMPIPESTAT1_PF5 NFRB_ NFALE_ ETMPIPESTAT0_PF4 NFWP_B_ NFWE_B_ ETMPIPESTAT2_PF6 Freescale Semiconductor ...
Page 133
... GND GND GND GND GND GND GND GND QVDD QVDD QVDD D0 D11 D7 D13 D8 D12 D5 D14 D9 D15 D10 Freescale Semiconductor XTAL32K ATA_DATA2 _SD3_D2_PD4 SD3_CLK_ ATA_DATA3 ETMTRACEPKT15_PD1 _SD3_D3_PD5 ATA_DATA1_SD3 ATA_DATA4_ _D1_PD3 ETMTRACEPKT14_PD6 ATA_DATA0_SD3 ATA_DATA5_ _D0_PD2 ETMTRACEPKT13_PD7 NVDD6 FUSEVDD NVDD6 FUSEVSS QVDD QVDD GND ...
Page 134
... SDQS3 SD28 A0 A25 A24 A2 SDBA1 SD30 i.MX27 and i.MX27L Data Sheet, Rev. 1.6 XTAL26M CLKMODE0 RESET_IN_B IOIS16_ATA_ INTRQ_PF9 PC_BVD1_ATA _DMARQ_PF12 PC_WAIT_B _ATA_CS1_PF18 EXT_60M EB0_B CS1_B RW_B SDCLK DQM0 SD0 A15 SD7 SD11 SD15 SD16 A20 SD22 SD24 A23 SD25 Freescale Semiconductor ...
Page 135
... CS3_B SDWE_B CAS_B A10 DQM2 SD1 SD3 SD4 A14 SD5 A16 SD10 SD8 SD14 A17 SDQS1 A18 SD19 SD18 SD21 A21 SDQS2 SD23 GND GND GND GND Freescale Semiconductor i.MX27 and i.MX27L Data Sheet, Rev. 1.6 Package Information and Pinout 135 ...
Page 136
... A18 A19 A2 A20 A21 A22 A23 A24 A25 ATA_DATA0_SD3_D0_PD2 ATA_DATA1_SD3_D1_PD3 ATA_DATA10_ETMTRACEPKT9_PD12 ATA_DATA11_ETMTRACEPKT8_PD13 ATA_DATA12_ETMTRACEPKT7_PD14 ATA_DATA13_ETMTRACEPKT6_PD15 i.MX27 and i.MX27L Data Sheet, Rev. 1.6 Location V2 T6 AB12 AC10 AA10 AC9 AC7 AC6 Y7 V1 AA5 AC4 V6 AA2 P20 P21 U23 U22 U21 U20 Freescale Semiconductor ...
Page 137
... Table 62. i.MX27 BGA (19 mm × 19 mm)—Contact Name Listing (continued) Freescale Semiconductor Contact Name ATA_DATA14_ETMTRACEPKT5_PD16 ATA_DATA15_ETMTRACEPKT4_PF23 ATA_DATA2_SD3_D2_PD4 ATA_DATA3_SD3_D3_PD5 ATA_DATA4_ETMTRACEPKT14_PD6 ATA_DATA5_ETMTRACEPKT13_PD7 ATA_DATA6_FEC_MDIO_PD8 ATA_DATA7_ETMTRACEPKT12_PD9 ATA_DATA8_ETMTRACEPKT11_PD10 ATA_DATA9_ETMTRACEPKT10_PD11 AVDD AVSS BCLK BOOT0 BOOT1 BOOT2 BOOT3 CAS_B CLKMODE0 CLKMODE1 CLKO_PF15 CLS_PA25 CONTRAST_PA30 CS0_B CS1_B CS2_B CS3_B ...
Page 138
... CSPI1_RDY_PD25 CSPI1_SCLK_PD29 CSPI1_SS0_PD28 CSPI1_SS1_PD27 CSPI1_SS2_USBH2_DATA5_PD26 CSPI2_MISO_USBH2_DATA2_PD23 CSPI2_MOSI_USBH2_DATA1_PD24 CSPI2_SCLK_USBH2_DATA0_PD22 CSPI2_SS0_USBH2_DATA6_PD21 CSPI2_SS1_USBH2_DATA3_PD20 CSPI2_SS2_USBH2_DATA4_PD19 D0 D1 D10 D11 D12 D13 D14 D15 i.MX27 and i.MX27L Data Sheet, Rev. 1.6 Location A21 C20 B20 D19 B21 C21 D20 E20 D23 D22 C23 C22 D21 Freescale Semiconductor ...
Page 139
... Table 62. i.MX27 BGA (19 mm × 19 mm)—Contact Name Listing (continued) Freescale Semiconductor Contact Name DQM0 DQM1 DQM2 DQM3 EB0_B EB1_B ECB_B EXT_266M EXT_60M EXTAL26M EXTAL32K FPMVDD FPMVSS FUSEVDD FUSEVSS GND GND GND GND GND GND GND GND GND GND GND GND ...
Page 140
... GND GND GND i.MX27 and i.MX27L Data Sheet, Rev. 1.6 Location B22 B23 F6 F7 F18 G7 J9 J10 J11 J12 J13 J14 J15 K9 K10 K11 K12 K13 K14 K15 L9 L10 L11 L12 L13 L14 L15 M9 M10 M11 M12 M13 M14 Freescale Semiconductor ...
Page 141
... Table 62. i.MX27 BGA (19 mm × 19 mm)—Contact Name Listing (continued) Freescale Semiconductor Contact Name GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND HSYNC_PA28 I2C_CLK_PD18 ...
Page 142
... LD11_PA17 LD12_PA18 LD13_PA19 LD14_PA20 LD15_PA21 LD16_PA22 LD17_PA23 LD2_PA8 LD3_PA9 LD4_PA10 LD5_PA11 LD6_PA12 LD7_PA13 LD8_PA14 LD9_PA15 LSCLK_PA5 MA10 MPLLVDD i.MX27 and i.MX27L Data Sheet, Rev. 1.6 Location F13 B14 C14 A15 B15 F11 D11 B12 A12 C12 D12 AC15 V17 Freescale Semiconductor ...
Page 143
... Table 62. i.MX27 BGA (19 mm × 19 mm)—Contact Name Listing (continued) Freescale Semiconductor Contact Name MPLLVSS NC_P4_1 NFALE_ETMPIPESTAT0_PF4 NFCE_B_ETMTRACEPKT2_PF3 NFCLE_ETMTRACEPKT0_PF1 NFRB_ETMTRACEPKT3_PF0 NFRE_B_ETMPIPESTAT1_PF5 NFWE_B_ETMPIPESTAT2_PF6 NFWP_B_ETMTRACEPKT1_PF2 NVDD1 NVDD1 NVDD1 NVDD1 NVDD10 NVDD10 NVDD11 NVDD11 NVDD11 NVDD12 NVDD12 NVDD13 NVDD14 NVDD14 NVDD15 NVDD15 NVDD2 NVDD2 ...
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... Data Sheet, Rev. 1.6 Location U12 U14 U15 U16 V15 V16 P17 P18 J18 K18 G15 G16 G13 G14 C3 Y16 W20 W22 W21 M21 N21 N22 AA19 AB20 AB18 Y17 Y20 AC19 AB19 Y19 AB21 Y18 AC20 Freescale Semiconductor ...
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... Table 62. i.MX27 BGA (19 mm × 19 mm)—Contact Name Listing (continued) Freescale Semiconductor Contact Name PC_WAIT_B_ATA_CS1_PF18 POR_B POWER_CUT POWER_ON_RESET PS_PA26 PWMO_PE5 QVDD QVDD QVDD QVDD QVDD QVDD QVDD QVDD QVDD QVDD QVDD QVDD QVDD QVDD QVDD QVDD QVDD QVDD QVDD QVDD QVDD ...
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... SD15 i.MX27 and i.MX27L Data Sheet, Rev. 1.6 Location R16 T8 T9 T10 T11 T12 T13 T14 T15 T16 U10 Y12 AA21 AC21 F4 A18 M18 M17 AA14 AA11 AB11 C19 A20 B18 A19 B19 D18 AB8 AA8 V9 Y8 AB7 AA7 Freescale Semiconductor ...
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... Table 62. i.MX27 BGA (19 mm × 19 mm)—Contact Name Listing (continued) Freescale Semiconductor Contact Name SD16 SD17 SD18 SD19 SD2 SD2_CLK_MSHC_SCLK_PB9 SD2_CMD_MSHC_BS_PB8 SD2_D0_MSHC_DATA0_PB4 SD2_D1_MSHC_DATA1_PB5 SD2_D2_MSHC_DATA2_PB6 SD2_D3_MSHC_DATA3_PB7 SD20 SD21 SD22 SD23 SD24 SD25 SD26 SD27 SD28 SD29 SD3 SD3_CLK_ETMTRACEPKT15_PD1 SD3_CMD_PD0 SD30 SD31 SD4 ...
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... SSI3_TXDAT_SLCDC2_CS_PC30 SSI4_CLK_PC19 SSI4_FS_PC16 SSI4_RXDAT_PC17 SSI4_TXDAT_PC18 TCK TDI TDO TIN_PC15 TMS TOUT_PC14 i.MX27 and i.MX27L Data Sheet, Rev. 1.6 Location W1 V13 U13 AA13 Y13 Y10 AB6 AB3 W3 AB13 D10 C10 B10 F10 A11 A10 B11 C11 F15 D17 D16 C8 C18 A7 Freescale Semiconductor ...
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... Table 62. i.MX27 BGA (19 mm × 19 mm)—Contact Name Listing (continued) Freescale Semiconductor Contact Name TRST_B UART1_CTS_PE14 UART1_RTS_PE15 UART1_RXD_PE13 UART1_TXD_PE12 UART2_CTS_KP_COL7_PE3 UART2_RTS_KP_ROW7_PE4 UART2_RXD_KP_ROW6_PE7 UART2_TXD_KP_COL6_PE6 UART3_CTS_PE10 UART3_RTS_PE11 UART3_RXD_PE9 UART3_TXD_PE8 UPLLVDD UPLLVSS USB_OC_B_PB24 USB_PWR_PB23 USBH1_FS_UART4_RTS_PB26 USBH1_OE_B_PB27 USBH1_RCV_PB25 USBH1_RXDM_PB30 USBH1_RXDP_UART4_RXD_PB31 USBH1_SUSP_PB22 USBH1_TXDM_UART4_TXD_PB28 USBH1_TXDP_UART4_CTS_PB29 USBH2_CLK_PA0 USBH2_DATA7_PA2 ...
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... Definitions of these types are available at: http://www.freescale.com. 150 Contact Name USBOTG_DATA2_PC10 USBOTG_DATA3_PC13 USBOTG_DATA4_PC12 USBOTG_DATA5_PC7 USBOTG_DATA6_PC8 USBOTG_DATA7_PE25 USBOTG_DIR_KP_ROW7A_PE2 USBOTG_NXT_KP_COL6A_PE0 USBOTG_STP_KP_ROW6A_PE1 VSYNC_PA29 XTAL26M XTAL32K i.MX27 and i.MX27L Data Sheet, Rev. 1.6 Location H23 J22 J21 H20 H21 L20 M20 L21 L23 D4 AA23 P23 Freescale Semiconductor ...
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... Corrected part number in section 1.3, “Ordering Information,” Part number previously listed as MCIMX27FVOP4A has been corrected to read MCIMX27VOP4A. 1.1 7/2008 Formatting and template work. Freescale Semiconductor Table 63. Document Revision History Significant Change(s) Section 4.3.12.1, “WEIM Synchronous Mode Sample Point.” Table 50. Table 1, “ ...
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... Freescale Semiconductor product could create a situation where personal injury or death may occur. Should Buyer ...