LAN7500-ABZJ

Manufacturer Part NumberLAN7500-ABZJ
DescriptionIC USB-10/100/1K ETH CTRL 56QFN
ManufacturerSMSC
LAN7500-ABZJ datasheets
 


Specifications of LAN7500-ABZJ

Mfg Application NotesLAN7500 SchematicDesign ResourcesLAN7500 BOM
Controller TypeEthernet Controller, USB 2.0 to 10/100/1KInterfaceUSB/Serial
Voltage - Supply1.2V, 2.5V, 3.3VOperating Temperature0°C ~ 70°C
Mounting TypeSurface MountPackage / Case56-VFQFN Exposed Pad
Lead Free Status / RoHS StatusLead free / RoHS CompliantCurrent - Supply-
Other names638-1108  
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Hi-Speed USB 2.0 to 10/100/1000 Ethernet Controller
Datasheet
NUM PINS
NAME
Crystal Input
1
Crystal
1
Output
Ethernet
TX/RX
1
Positive
Channel 0
Ethernet
TX/RX
1
Negative
Channel 0
Ethernet
TX/RX
1
Positive
Channel 1
Ethernet
TX/RX
1
Negative
Channel 1
Ethernet
TX/RX
1
Positive
Channel 2
Ethernet
TX/RX
1
Negative
Channel 2
Ethernet
TX/RX
1
Positive
Channel 3
Ethernet
TX/RX
1
Negative
Channel 3
External PHY
ETHRBIAS
1
Bias Resistor
SMSC LAN7500/LAN7500i
Table 2.5 Ethernet PHY Pins
BUFFER
SYMBOL
TYPE
XI
ICLK
External 25 MHz crystal input.
Note:
XO
OCLK
External 25 MHz crystal output.
TR0P
AIO
Transmit/Receive Positive Channel 0.
TR0N
AIO
Transmit/Receive Negative Channel 0.
TR1P
AIO
Transmit/Receive Positive Channel 1.
TR1N
AIO
Transmit/Receive Negative Channel 1.
TR2P
AIO
Transmit/Receive Positive Channel 2.
TR2N
AIO
Transmit/Receive Negative Channel 2.
TR3P
AIO
Transmit/Receive Positive Channel 3.
TR3N
AIO
Transmit/Receive Negative Channel 3.
AI
Used for the internal bias circuits. Connect to an
external 8.06K 1.0% resistor to ground.
15
DATASHEET
DESCRIPTION
This pin can also be driven by a single-
ended clock oscillator. When this
method is used, XO should be left
unconnected
Revision 1.0 (11-01-10)