LAN7500-ABZJ

Manufacturer Part NumberLAN7500-ABZJ
DescriptionIC USB-10/100/1K ETH CTRL 56QFN
ManufacturerSMSC
LAN7500-ABZJ datasheets
 


Specifications of LAN7500-ABZJ

Mfg Application NotesLAN7500 SchematicDesign ResourcesLAN7500 BOM
Controller TypeEthernet Controller, USB 2.0 to 10/100/1KInterfaceUSB/Serial
Voltage - Supply1.2V, 2.5V, 3.3VOperating Temperature0°C ~ 70°C
Mounting TypeSurface MountPackage / Case56-VFQFN Exposed Pad
Lead Free Status / RoHS StatusLead free / RoHS CompliantCurrent - Supply-
Other names638-1108  
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Hi-Speed USB 2.0 to 10/100/1000 Ethernet Controller
Datasheet
7.6
Clock Circuit
The device can accept either a 25MHz crystal (preferred) or a 25MHz single-ended clock oscillator (+/-
50ppm) input. If the single-ended clock oscillator method is implemented, XO should be left
unconnected and XI should be driven with a nominal 0-3.3V clock signal. The input clock duty cycle
is 40% minimum, 50% typical and 60% maximum.
It is recommended that a crystal utilizing matching parallel load capacitors be used for the crystal
input/output signals (XI/XO). See
Table 7.20 LAN7500/LAN7500i Crystal Specifications
PARAMETER
Crystal Cut
Crystal Oscillation Mode
Crystal Calibration Mode
Frequency
o
Frequency Tolerance @ 25
C
Frequency Stability Over Temp
Frequency Deviation Over Time
Total Allowable PPM Budget
Shunt Capacitance
Load Capacitance
Drive Level
Equivalent Series Resistance
Operating Temperature Range
LAN7500/LAN7500i XI Pin
Capacitance
LAN7500/LAN7500i XO Pin
Capacitance
Note 7.15 The maximum allowable values for Frequency Tolerance and Frequency Stability are
application dependant. Since any particular application must meet the IEEE +/-50 PPM
Total PPM Budget, the combination of these two values must be approximately +/-45 PPM
(allowing for aging).
Note 7.16 Frequency Deviation Over Time is also referred to as Aging.
Note 7.17 The total deviation for the Transmitter Clock Frequency is specified by IEEE 802.3u as
+/- 50 PPM.
o
Note 7.18 0
C for commercial version, -40
o
Note 7.19 +70
C for commercial version, +85
Note 7.20 This number includes the pad, the bond wire and the lead frame. PCB capacitance is not
included in this value. The XO/XI pin and PCB capacitance values are required to
accurately calculate the value of the two external load capacitors. These two external load
capacitors determine the accuracy of the 25.000 MHz frequency.
SMSC LAN7500/LAN7500i
Table 7.20
for the recommended crystal specifications.
SYMBOL
MIN
NOM
AT, typ
Fundamental Mode
Parallel Resonant Mode
F
-
25.000
fund
F
-
-
tol
F
-
-
temp
F
-
+/-3 to 5
age
-
-
C
-
7 typ
O
C
-
20 typ
L
P
300
-
W
R
-
-
1
Note 7.18
-
-
3 typ
-
3 typ
o
C for industrial version.
o
C for industrial version.
53
DATASHEET
MAX
UNITS
NOTES
-
MHz
+/-50
PPM
Note 7.15
+/-50
PPM
Note 7.15
-
PPM
Note 7.16
+/-50
PPM
Note 7.17
-
pF
-
pF
-
uW
50
Ohm
o
Note 7.19
C
-
pF
Note 7.20
-
pF
Note 7.20
Revision 1.0 (11-01-10)