LAN7500I-ABZJ SMSC, LAN7500I-ABZJ Datasheet - Page 13

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LAN7500I-ABZJ

Manufacturer Part Number
LAN7500I-ABZJ
Description
IC USB-10/100/1K ETH CTRL 56QFN
Manufacturer
SMSC
Datasheets

Specifications of LAN7500I-ABZJ

Design Resources
LAN7500I BOM LAN7500I Schematic
Controller Type
Ethernet Controller, USB 2.0 to 10/100/1K
Interface
USB/Serial
Voltage - Supply
1.2V, 2.5V, 3.3V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
56-VFQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-
Other names
638-1109

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Hi-Speed USB 2.0 to 10/100/1000 Ethernet Controller
Datasheet
SMSC LAN7500/LAN7500i
NUM PINS
NUM PINS
1
1
1
1
1
1
1
1
1
1
Purpose I/O 6
Purpose I/O 7
Purpose I/O 8
Purpose I/O 9
Purpose I/O
Purpose I/O
Chip Select
PME Mode
EEPROM
EEPROM
EEPROM
EEPROM
Data Out
General
General
General
General
General
General
Data In
NAME
NAME
Select
Clock
10
11
PME_MODE_SEL
SYMBOL
SYMBOL
GPIO10
GPIO11
EECLK
GPIO6
GPIO7
GPIO8
GPIO9
EEDO
EECS
EEDI
Table 2.1 GPIO Pins (continued)
Table 2.2 EEPROM Pins
DATASHEET
VIS/VO8/
VIS/VO8/
VIS/VO6/
VIS/VO8/
VIS/VO8/
VIS/VO8/
BUFFER
BUFFER
TYPE
VOD8
VOD8
VOD6
VOD8
VOD8
VOD8
TYPE
(PU)
(PU)
(PU)
(PU)
(PU)
(PU)
(PU)
(PD)
VO8
VO8
VO8
VIS
VIS
13
This pin may serve as the PME_MODE_SEL
input when PME mode of operation is in effect.
Refer to
for additional information.
This General Purpose I/O pin is fully
programmable as either a push-pull output, an
open-drain output, or a Schmitt-triggered input.
This General Purpose I/O pin is fully
programmable as either a push-pull output, an
open-drain output, or a Schmitt-triggered input.
This General Purpose I/O pin is fully
programmable as either a push-pull output, an
open-drain output, or a Schmitt-triggered input.
This General Purpose I/O pin is fully
programmable as either a push-pull output, an
open-drain output, or a Schmitt-triggered input.
This General Purpose I/O pin is fully
programmable as either a push-pull output, an
open-drain output, or a Schmitt-triggered input.
This General Purpose I/O pin is fully
programmable as either a push-pull output, an
open-drain output, or a Schmitt-triggered input.
This pin is driven by the EEDO output of the
external EEPROM.
This pin drives the EEDI input of the external
EEPROM.
This pin drives the chip select output of the
external EEPROM.
Note:
This pin drives the EEPROM clock of the external
EEPROM.
Chapter 4, "PME Operation," on page 30
The EECS output may tri-state briefly
during power-up. Some EEPROM
devices may be prone to false selection
during this time. When an EEPROM is
used, an external pull-down resistor is
recommended on this signal to prevent
false selection. Refer to your EEPROM
manufacturer’s datasheet for additional
information.
DESCRIPTION
DESCRIPTION
Revision 1.0 (11-01-10)

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