LAN7500I-ABZJ SMSC, LAN7500I-ABZJ Datasheet - Page 23

• Manufacturer Part Number: LAN7500I-ABZJ
• Description: IC USB-10/100/1K ETH CTRL 56QFN
• Manufacturer: SMSC

Specifications of LAN7500I-ABZJ

• Design Resources: LAN7500I BOM LAN7500I Schematic
• Controller Type: Ethernet Controller, USB 2.0 to 10/100/1K
• Interface: USB/Serial
• Voltage - Supply: 1.2V, 2.5V, 3.3V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 56-VFQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Other names: 638-1109

Hi-Speed USB 2.0 to 10/100/1000 Ethernet Controller
Datasheet
SMSC LAN7500/LAN7500i
BITS
7
6
5
4
3
2
GPIO PME Enable
Setting this bit enables the assertion of the
Packet, or PHY Link Up. The host processor may use the
manner analogous to a PCI PME pin.
0 = The device does not support GPIO PME signaling.
1 = The device supports GPIO PME signaling.
Note:
GPIO PME Configuration
This bit selects whether the GPIO PME is signaled on the
selected, the duration of the pulse is determined by the setting of the
byte. The level of the signal or the polarity of the pulse is determined by the
this flag byte.
0 = GPIO PME is signaled via a level.
1 = GPIO PME is signaled via a pulse.
Note:
GPIO PME Length
When the
pulse on the
0 = GPIO PME pulse length is 1.5 mS.
1 = GPIO PME pulse length is 150 mS.
Note:
GPIO PME Polarity
Specifies the level of the signal or the polarity of the pulse used for GPIO PME signaling.
0 = GPIO PME signaling polarity is low.
1 = GPIO PME signaling polarity is high.
Note:
GPIO PME Buffer Type
This bit selects the output buffer type for GPIO5.
0 = Open drain driver / open source
1 = Push-Pull driver
Note:
Note:
GPIO PME WOL Select
Four types of wakeup events are supported; Magic Packet, Perfect DA, PHY Link Up, and Wakeup
Pin(s) assertion. Wakeup Pin(s) are selected via the GPIO Wakeup Enables specified in bytes 1Eh and
1Fh of the EEPROM. This bit selects whether WOL events or Link Up wakeup events are supported.
0 = WOL event wakeup supported.
1 = PHY linkup wakeup supported.
Note:
Note:
Table 3.4
When this bit is 0, the remaining GPIO PME parameters in this flag byte are ignored.
If
If
If
Buffer Type = 0, Polarity = 0 implies Open Drain
Buffer Type = 0, Polarity = 1 implies Open Source
If
If WOL is selected, the
the WOL event(s) that will cause a wakeup.
If
GPIO PME Configuration
GPIO PME Enable
GPIO PME Enable
GPIO PME Enable
GPIO PME Enable
GPIO PME Enable
describes the GPIO PME flags.
GPIO5
pin, this bit determines the duration of the pulse.
is 0, this bit is ignored.
is 0, this bit is ignored.
is 0, this bit is ignored.
is 0, this bit is ignored.
is 0, this bit is ignored.
PME Magic Packet Enable
Table 3.4 GPIO PME Flags
bit of this flag byte indicates that the GPIO PME is signaled by a
DATASHEET
DESCRIPTION
GPIO5
23
pin, as a result of a Wakeup (GPIO) pin, Magic
GPIO5
GPIO5
and
PME Perfect DA Enable
pin to asynchronously wake up, in a
pin as a level or a pulse. If pulse is
GPIO PME Length
GPIO PME Polarity
Revision 1.0 (11-01-10)
bits determine
bit of this flag
bit of