V2DIP1-48 FTDI, V2DIP1-48 Datasheet
V2DIP1-48
Specifications of V2DIP1-48
Related parts for V2DIP1-48
V2DIP1-48 Summary of contents
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... No freedom to use patents or other intellectual property rights is implied by the publication of this document. Future Technology Devices International Ltd, Unit 1, 2 Seaward Place, Centurion Business Park, Glasgow, G41 1HH, United Kingdom. Scotland Registered Number: SC136640 Copyright © 2010 Future Technology Devices International Limited V2DIP1-48 Datasheet Document Reference No.: FT_000236 Version 1.0 ...
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... Introduction V2DIP1-48 module is designed to allow rapid development of designs using the VNC2-48Q IC. The V2DIP1-48 is supplied as a PCB designed provides access to the UART, parallel FIFO, and SPI interface pins of the VNC2-48Q device, via onboard header pins. The module has a single USB ports which is accessible via the onboard type A USB connector ...
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... Contact Information............................................................................. 21 Appendix A – References ............................................................................................ 22 Appendix B – List of Figures and Tables ................................................................... 23 List of Figures............................................................................................................... 23 List of Tables ................................................................................................................ 23 Appendix C – Revision History ................................................................................... 24 Copyright © 2010 Future Technology Devices International Limited V2DIP1-48 VNC2-48 Development Module Datasheet Version 1.0 Table of Contents Document Reference No.: FT_000236 Clearance No.: FTDI# 153 2 ...
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... All VNC2 signals available on 0.6” wide, 0.1” pitch DIL male connectors. Copyright © 2010 Future Technology Devices International Limited Document Reference No.: FT_000236 V2DIP1-48 VNC2-48 Development Module Datasheet Version 1.0 : Auxiliary 3 200 mA power output to external logic. Power and traffic indicator LED’s V2DIP1- Pb-free, RoHS complaint development module ...
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... IO13 IO14 IO15 IO16 J1-12 IO17 Figure 3.1 - V2DIP1 48 Module Pin Out (Top View) Copyright © 2010 Future Technology Devices International Limited Document Reference No.: FT_000236 V2DIP1-48 VNC2-48 Development Module Datasheet Version 1.0 3V3 PRG# RST# IO25 IO24 IO23 GND IO22 IO21 ...
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... Figure 3.2 - V2DIP1 48 Module Pin Out (Bottom View) Copyright © 2010 Future Technology Devices International Limited Document Reference No.: FT_000236 V2DIP1-48 VNC2-48 Development Module Datasheet Version 1.0 Clearance No.: FTDI# 153 5 ...
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... Type PWR Input 5.0V module supply pin. This pin can be used to provide the 5.0V input to the V2DIP1-48 when the V2DIP1-48 is not powered from the USB connector (VBUS) or the debugger interface. Also connected to DIL connector pins J1-2, J1-3 and J1-9 and J3-6. ...
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... J2-12 IOBUS18 IO18 (13) Table 3.1 - Pin Signal Descriptions Copyright © 2010 Future Technology Devices International Limited V2DIP1-48 VNC2-48 Development Module Datasheet Version 1.0 Type I/O 5V safe bidirectional data / control bus bit 24 I/O 5V safe bidirectional data / control bus bit 23 PWR Module ground supply pin ...
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... NOTE: This is only applicable when using VNC1L compatible firmware e.g. V2DAP2. Other wise the user can set the pins for their own use. Copyright © 2010 Future Technology Devices International Limited Document Reference No.: FT_000236 V2DIP1-48 VNC2-48 Development Module Datasheet Version 1.0 Figure 3.3 IOBUS26 (VNC2-48Q pin 46) ...
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... IO18 J2-11 IOBUS19 IO19 J2-10 IOBUS20 IO20 Table 3.3 - Default Interface I/O Pin Configuration Copyright © 2010 Future Technology Devices International Limited V2DIP1-48 VNC2-48 Development Module Datasheet Version 1.0 Data and Control Bus Configuration Type UART SPI Slave Interface Interface I/O NA ...
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... J1-10, J2-11, J2-6 J1-6, J1-11, J2-5, J2-10 Table 3.4 - Data and Control Bus Signal Mode Options – UART Interface Copyright © 2010 Future Technology Devices International Limited Document Reference No.: FT_000236 V2DIP1-48 VNC2-48 Development Module Datasheet Version 1.0 Table 3.4 Name Type uart_txd ...
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... J1-10, J2-11, J2-6 J1-6, J1-11, J2-5, J2-10 Table 3.6 - Data and Control Bus Signal Mode Options – SPI Master Copyright © 2010 Future Technology Devices International Limited Document Reference No.: FT_000236 V2DIP1-48 VNC2-48 Development Module Datasheet Version 1.0 FTDI website. Name Type ...
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... J1-3, J1-9, J2-12, J2-8 J1-10, J2-11, J2-6 Table 3.7 - Data and Control Bus Signal Mode Options – Parallel FIFO Interface Copyright © 2010 Future Technology Devices International Limited Document Reference No.: FT_000236 V2DIP1-48 VNC2-48 Development Module Datasheet Version 1.0 Name Type I/O fifo_data[0] ...
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... When FIFO_WR# goes low FIFO_TXE# flag will always go high. FIFO_TXE# goes low again only when there is still space for data to be written in to the module. Copyright © 2010 Future Technology Devices International Limited Document Reference No.: FT_000236 V2DIP1-48 VNC2-48 Development Module Datasheet Version 1.0 Table 3.8 Min Max ...
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... Figure 3.5 and Table 3.10 Figure 3.5 - Synchronous FIFO Mode Read and Write Cycle Copyright © 2010 Future Technology Devices International Limited Document Reference No.: FT_000236 V2DIP1-48 VNC2-48 Development Module Datasheet Version 1.0 3.9. Name Type Output fifo_oe# Output fifo_clkout Clearance No ...
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... Similarly when bursts of data are to be written to the module WR# should be kept low. TXE# remains low when there is still space available for the data to be written Copyright © 2010 Future Technology Devices International Limited Document Reference No.: FT_000236 V2DIP1-48 VNC2-48 Development Module Datasheet Version 1.0 Min Typical Max - 20 ...
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... J3-6 5V0 VCC Table 3.11 - Signal Name and Description – Debugger Interface Copyright © 2010 Future Technology Devices International Limited Document Reference No.: FT_000236 V2DIP1-48 VNC2-48 Development Module Datasheet Version 1.0 Type Description I/O Debugger Interface - Not connected. Used to make sure that the debug module is connected correctly ...
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... Firmware 4.1 Firmware Support V2DIP1-48 can be programmed with the customers own firmware or with pre-compiled firmware profiles to allow a designer to easily change the functionality of the chip. 4.2 Available Firmware V2DAP firmware is currently available: USB Host for single Flash Disk and general purpose USB peripherals ...
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... The external circuit configuration for adding second USB host port, with the USB activity LED, is shown below in Figure 5.1 Figure 5.1 Additional USB Port Configuration Copyright © 2010 Future Technology Devices International Limited Document Reference No.: FT_000236 V2DIP1-48 VNC2-48 Development Module Datasheet Version 1.0 Clearance No.: FTDI# 153 Forma Delet 18 ...
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... Figure 6.1 V2DIP1 48 Dimensions (Top View) Figure 6.2 V2DIP1 48 Dimensions (Side View) Tolerance is ±0.2mm All dimensions are in mm Copyright © 2010 Future Technology Devices International Limited V2DIP1-48 VNC2-48 Development Module Datasheet Version 1.0 50.45 13.97 41.91 43.18 2.54 Document Reference No.: FT_000236 Clearance No ...
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... Schematic Diagram Figure 7.1 - Schematic Diagram Copyright © 2010 Future Technology Devices International Limited Document Reference No.: FT_000236 V2DIP1-48 VNC2-48 Development Module Datasheet Version 1.0 Clearance No.: FTDI# 153 20 ...
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... Please visit the Sales Network page of the FTDI Web site for the contact details of our distributor(s) and sales representative(s) in your country. Copyright © 2010 Future Technology Devices International Limited Document Reference No.: FT_000236 V2DIP1-48 VNC2-48 Development Module Datasheet Version 1.0 Clearance No.: FTDI# 153 21 ...
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... Vinculum-II Debug Interface Description Vinculum-II IO Mux Explained Vinculum-II PWM Example Migrating Vinculum Designs From VNC1L to VNC2-48L1A Vinculum-II Errata Technical Note Copyright © 2010 Future Technology Devices International Limited Document Reference No.: FT_000236 V2DIP1-48 VNC2-48 Development Module Datasheet Version 1.0 Clearance No.: FTDI# 153 22 ...
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... Table 3.9 - Data and Control Bus Signal Mode Options – Synchronous FIFO mode .............................. 14 Table 3.10 - Synchronous FIFO Mode Read and Write Cycle Timing ................................................... 15 Table 3.11 - Signal Name and Description – Debugger Interface ....................................................... 16 Copyright © 2010 Future Technology Devices International Limited Document Reference No.: FT_000236 V2DIP1-48 VNC2-48 Development Module Datasheet Version 1.0 Clearance No.: FTDI# 153 23 ...
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... Appendix C – Revision History Version 1.0 First Release Copyright © 2010 Future Technology Devices International Limited Document Reference No.: FT_000236 V2DIP1-48 VNC2-48 Development Module Datasheet Version 1.0 Clearance No.: FTDI# 153 16th April 2010 24 ...