V2DIP1-64 FTDI, V2DIP1-64 Datasheet
V2DIP1-64
Specifications of V2DIP1-64
Related parts for V2DIP1-64
V2DIP1-64 Summary of contents
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... No freedom to use patents or other intellectual property rights is implied by the publication of this document. Future Technology Devices International Ltd, Unit 1, 2 Seaward Place, Centurion Business Park, Glasgow, G41 1HH, United Kingdom. Scotland Registered Number: SC136640 Copyright © 2010 Future Technology Devices International Limited V2DIP1-64 Datasheet Document Reference No.: FT_000165 Version 1.0 ...
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... Introduction V2DIP1-64 module is designed to allow rapid development of designs using the VNC2-64Q IC. The V2DIP1-64 is supplied as a PCB designed provides access to the UART, parallel FIFO, and SPI interface pins of the VNC2-64Q device, via its IO bus pins. One USB port is accessed via a type A USB connector. ...
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... Contact Information ...................................................... 23 Appendix A – References ................................................................. 24 Appendix B – List of Figures and Tables .......................................... 25 List of Figures ................................................................................. 25 List of Tables ................................................................................... 25 Appendix C – Revision History ......................................................... 26 Copyright © 2010 Future Technology Devices International Limited V2DIP1-64 VNCL2-64Q Development Module Datasheet Version 1.0 Table of Contents Document Reference No.: FT_000165 Clearance No.: FTDI# 154 2 ...
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... Auxiliary 3 200 mA power output to external logic Copyright © 2010 Future Technology Devices International Limited Document Reference No.: FT_000165 V2DIP1-64 VNCL2-64Q Development Module Datasheet Version 1.0 : features All VNC2 signals available on 0.8” wide, 0.1” pitch DIL male connectors. Power and traffic indicator LED’s ...
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... U1M IO12 GND IO13 IO14 IO15 IO16 IO17 J1-30 Figure 3.1 - V2DIP1-64 Module Pin Out (Top View) Copyright © 2010 Future Technology Devices International Limited Document Reference No.: FT_000165 V2DIP1-64 VNCL2-64Q Development Module Datasheet Version 1.0 LED2 LED3 LED1 IO43 IO42 IO41 ...
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... Figure 3.2 - V2DIP1-64 Module Pin Out (Bottom View) Copyright © 2010 Future Technology Devices International Limited Document Reference No.: FT_000165 V2DIP1-64 VNCL2-64Q Development Module Datasheet Version 1.0 Clearance No.: FTDI# 154 5 ...
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... PWR Input 5.0V module supply pin. This pin can be used to provide the 5.0V input to the V2DIP1-64 when the V2DIP1-64 is not powered from the USB connector (VBUS) or the debugger interface. Also connected to DIL connector pins J1-12, J1-13 and J1-19 and J3-6. ...
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... IOBUS19 IO19 J2-30 IOBUS18 IO18 Table 3.1 - Pin Signal Descriptions Copyright © 2010 Future Technology Devices International Limited V2DIP1-64 VNCL2-64Q Development Module Datasheet Version 1.0 Type I/O 5V safe bidirectional data / control bus bit 33 I/O 5V safe bidirectional data / control bus bit 34 PWR ...
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... J1-14 IO5 I/O J1-15 IO6 I/O Table 3.2 - Default Interface I/O Pin Configuration Copyright © 2010 Future Technology Devices International Limited V2DIP1-64 VNCL2-64Q Development Module Datasheet Version 1.0 Table 3.2 Data and Control Bus Configuration Options SPI Slave SPI Interface Master ...
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... I/O J1-28 IO15 I/O J1-29 IO16 I/O Table 3.2 - Default Interface I/O Pin Configuration Copyright © 2010 Future Technology Devices International Limited V2DIP1-64 VNCL2-64Q Development Module Datasheet Version 1.0 Data and Control Bus Configuration Options SPI Slave SPI Interface Master Interface NA ...
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... J2-14, J1-17, J1-24, J1-29, J2-28, J2- 23, J1-3, J1-7, J2-8, J2-4 Table 3.3 - Data and Control Bus Signal Mode Options – UART Copyright © 2010 Future Technology Devices International Limited V2DIP1-64 VNCL2-64Q Development Module Datasheet Version 1.0 Name Type Transmit asynchronous data ...
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... J2-15, JI-16, J1-21, J1-28, J2-29, J2-24, J1-2, J1-6, J2-9, J2-5, J2-1 Table 3.4 - Data and Control Bus Signal Mode Options – SPI Slave Copyright © 2010 Future Technology Devices International Limited V2DIP1-64 VNCL2-64Q Development Module Datasheet Version 1.0 FTDI website Name Type ...
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... J2-14, J1-17, J1-24, J1-29, J2-28, J2- 23, J1-3, J1-7, J2-8, J2-4 Table 3.5 - Data and Control Bus Signal Mode Options – SPI Master Copyright © 2010 Future Technology Devices International Limited V2DIP1-64 VNCL2-64Q Development Module Datasheet Version 1.0 Name Type spi_m_clk Output ...
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... The Parallel FIFO Interface signals can be programmed to a choice of available I/O pins. Data and Control Bus Signal Mode Options – Parallel FIFO Interface Copyright © 2010 Future Technology Devices International Limited Document Reference No.: FT_000165 V2DIP1-64 VNCL2-64Q Development Module Datasheet Version 1.0 Clearance No.: FTDI# 154 Table 3 ...
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... J2-15, JI-16, J1-21, J1-28, J2-29, J2-24, J1-2, J1-6, J2-9, J2-5, J2-1 Table 3.6 - Data and Control Bus Signal Mode Options – Parallel FIFO Interface Copyright © 2010 Future Technology Devices International Limited V2DIP1-64 VNCL2-64Q Development Module Datasheet Version 1.0 Name Type I/O ...
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... When FIFO_WR# goes low FIFO_TXE# flag will always go high. FIFO_TXE# goes low again only when there is still space for data to be written in to the module. Copyright © 2010 Future Technology Devices International Limited Document Reference No.: FT_000165 V2DIP1-64 VNCL2-64Q Development Module Datasheet Version 1.0 Min Max Unit ...
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... When in Synchronous FIFO interface mode, the timing of a read and write operation on the FIFO interface are shown in Figure 3.4 and Table 3.9 Figure 3.4 - Synchronous FIFO Mode Read and Write Cycle Copyright © 2010 Future Technology Devices International Limited V2DIP1-64 VNCL2-64Q Development Module Datasheet Version 1.0 Name Type fifo_oe# ...
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... Similarly when bursts of data are to be written to the module WR# should be kept low. TXE# remains low when there is still space available for the data to be written Copyright © 2010 Future Technology Devices International Limited Document Reference No.: FT_000165 V2DIP1-64 VNCL2-64Q Development Module Datasheet Version 1.0 Min Typical Max - 20 ...
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... VNC2. PWR Input 5.0V module supply pin. This pin can be used to provide the 5.0V input to the V2DIP1-64 from the debugger interface when the V2DIP1-64 is not powered from the USB connector (VBUs) or the DIL connector pins J1-12, J1-13 and J1-19 and J3-6 ...
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... Firmware 4.1 Firmware Support The VNC2 on the V2DIP1-64 can be programmed with the customers own firmware created using the Vinculum II firmware development tool chain or with various pre-compiled firmware profiles to allow a designer to easily change the functionality of the chip. Please refer to:- available pre-compiled firmware 4 ...
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... The external circuit configuration for adding second USB host port, with the USB activity LED, is shown below in Figure 5.1 Figure 5.1 Additional USB Port Configuration Copyright © 2010 Future Technology Devices International Limited Document Reference No.: FT_000165 V2DIP1-64 VNCL2-64Q Development Module Datasheet Version 1.0 YYWW VNC2-64Q1A XXXXXXXX FTDI Clearance No.: FTDI# 154 ...
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... Figure 6.1 - V2DIP1-64 Dimensions (Top View) Figure 6.2 - V2DIP1-64 Dimensions (Side View) ±0.20mm Tolerance (except pitch) All dimensions are in mm. Copyright © 2010 Future Technology Devices International Limited V2DIP1-64 VNCL2-64Q Development Module Datasheet Version 1.0 91.53 84.64 86.24 2.54 Document Reference No.: FT_000165 Clearance No ...
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... Schematic Diagram Figure 7.1 - V2DIP1-64 Schematics Copyright © 2010 Future Technology Devices International Limited Document Reference No.: FT_000165 V2DIP1-64 VNCL2-64Q Development Module Datasheet Version 1.0 Clearance No.: FTDI# 154 22 ...
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... Please visit the Sales Network page of the FTDI Web site for the contact details of our distributor(s) and sales representative(s) in your country. Copyright © 2010 Future Technology Devices International Limited Document Reference No.: FT_000165 V2DIP1-64 VNCL2-64Q Development Module Datasheet Version 1.0 Clearance No.: FTDI# 154 23 ...
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... Vinculum-II Debug Interface Description Vinculum-II IO Mux Explained Vinculum-II PWM Example Migrating Vinculum Designs From VNC1L to VNC2-48L1A Vinculum-II Errata Technical Note Copyright © 2010 Future Technology Devices International Limited Document Reference No.: FT_000165 V2DIP1-64 VNCL2-64Q Development Module Datasheet Version 1.0 Clearance No.: FTDI# 154 24 ...
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... Appendix B – List of Figures and Tables List of Figures Figure 1.1 - V2DIP1 64 .................................................................................................................. 1 Figure 3.1 - V2DIP1-64 Module Pin Out (Top View) .......................................................................... 4 Figure 3.2 - V2DIP1-64 Module Pin Out (Bottom View) ..................................................................... 5 Figure 3.3 – Asynchronous FIFO Mode Read and Write Cycle. ........................................................... 15 Figure 3.4 - Synchronous FIFO Mode Read and Write Cycle .............................................................. 16 Figure 5 ...
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... Appendix C – Revision History Version 1.0 First Release Copyright © 2010 Future Technology Devices International Limited Document Reference No.: FT_000165 V2DIP1-64 VNCL2-64Q Development Module Datasheet Version 1.0 Clearance No.: FTDI# 154 19th April 2010 26 ...