WM8974GEFL/V Wolfson Microelectronics, WM8974GEFL/V Datasheet - Page 59

Audio CODECs Mono Codec with Spkr

WM8974GEFL/V

Manufacturer Part Number
WM8974GEFL/V
Description
Audio CODECs Mono Codec with Spkr
Manufacturer
Wolfson Microelectronics
Datasheet

Specifications of WM8974GEFL/V

Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
QFN-24
Minimum Operating Temperature
- 25 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Production Data
w
RECOMMENDED POWER UP/DOWN SEQENCE
Note:
In order
powered up and down using one of the following sequences:
Power Up When NOT Using the Output 1.5x Boost Stage:
1.
2.
3.
4.
5.
6.
Power Up When Using the Output 1.5x Boost Stage:
1.
2.
3.
4.
5.
6.
7.
Power Down (all cases):
1.
2.
3.
4.
Notes:
1.
2.
In addition to the power on sequence, it is recommended that the zero cross functions are used
when changing the volume in the PGAs to avoid any audible pops or clicks.
DCVDD should be greater than or equal to 1.9V when using the PLL.
DCVDD is less than or equal to DBVDD
This step enables the internal device bias buffer and the VMID buffer for unassigned
inputs/outputs. This will provide a startup reference voltage for all inputs and outputs. This will
cause the inputs and outputs to ramp towards VMID (NOT using output 1.5x boost) or 1.5 x
(AVDD/2) (using output 1.5x boost) in a way that is controlled and predictable (see note 2).
Choose the value of the VMIDSEL bits based on the startup time (VMIDSEL=10 for slowest
startup, VMIDSEL=11 for fastest startup). Startup time is defined by the value of the VMIDSEL
bits (the reference impedance) and the external decoupling capacitor on VMID.
Turn on external power supplies. Wait for supply voltage to settle.
Set BIASEN = 1, BUFIOEN = 1 and also the VMIDSEL[1:0] bits in the Power Management
1 register. * Notes 1 and 2.
Wait for the VMID supply to settle. * Note 2.
Enable DAC by setting DACEN = 1.
Enable mixers as required.
Enable output stages as required.
Turn on external power supplies. Wait for supply voltage to settle.
Enable 1.5x output boost. Set MONOBOOST = 1 and SPKBOOST = 1 as required.
Set BIASEN = 1, BUFIOEN = 1, BUFDCOPEN = 1 and also the VMIDSEL[1:0] bits in the
Power Management 1 register. * Notes 1 and 2.
Wait for the VMID supply to settle. * Note 2.
Enable DAC by setting DACEN = 1.
Enable mixers as required.
Enable output stages as required.
Soft mute DAC by setting DACMU = 1.
Disable power management register 1 by setting R1[8:0]=0x00.
Disable all other output stages.
Turn off external power supplies.
uxiliarise output pop and click noise, it is recommended that the WM8974 device is
PD, Rev 4.5, September 2008
WM8974
59

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