WM8510GEDS/V Wolfson Microelectronics, WM8510GEDS/V Datasheet - Page 18

Audio CODECs VoIP Mono CODEC

WM8510GEDS/V

Manufacturer Part Number
WM8510GEDS/V
Description
Audio CODECs VoIP Mono CODEC
Manufacturer
Wolfson Microelectronics
Datasheet

Specifications of WM8510GEDS/V

Operating Supply Voltage
- 0.3 V to + 7 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
SSOP-28
Minimum Operating Temperature
- 25 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
WM8510
w
The MICP path to the BOOST stage is controlled by the MICP2BOOSTVOL[2:0] register bits. When
MICP2BOOSTVOL=000 this input pin is completely disconnected from the BOOST stage. Settings
001 through to 111 control the gain in 3dB steps from -12dB to +6dB.
Table 4 Input BOOST Stage Control
The BOOST stage is enabled under control of the BOOSTEN register bit.
Table 5 Input BOOST Enable Control
MICROPHONE BIASING CIRCUIT
The MICBIAS output provides a low noise reference voltage suitable for biasing electret type
microphones and the associated external resistor biasing network. Refer to the Applications
Information section for recommended external components. The MICBIAS voltage can be altered via
the MBVSEL register bit.
MICBIAS=0.75*AVDD. The output can be enabled or disabled using the MICBEN control bit.
Table 6 Microphone Bias Enable
Table 7 Microphone Bias Voltage Control
The internal MICBIAS circuitry is shown in Figure 9.
capability for MICBIAS is 3mA. The external biasing resistors therefore must be large enough to limit
the MICBIAS current to 3mA.
R47
Input BOOST
control
R2
Power
management
2
R1
Power
management 1
R44
Input Control
REGISTER
REGISTER
ADDRESS
ADDRESS
REGISTER
REGISTER
ADDRESS
ADDRESS
2:0
6:4
4
BIT
BIT
4
8
BIT
BIT
MIC2_2BOOSTV
OL
MICP2BOOSTVOL
BOOSTEN
MICBEN
MBVSEL
When MBVSEL=0, MICBIAS=0.9*AVDD and when MBVSEL=1,
LABEL
LABEL
LABEL
LABEL
0
0
DEFAULT
DEFAULT
000
000
0
DEFAULT
DEFAULT
Note that the maximum source current
Microphone Bias Enable
0 = OFF (high impedance output)
1 = ON
0 = 0.9 * AVDD
1 = 0.65 * AVDD
Microphone Bias Voltage Control
input boost stage:
000=Path disabled (disconnected)
001=-12dB gain through boost stage
010=-9dB gain through boost stage
111=+6dB gain through boost stage
Controls the MICP pin to the input
boost stage (NB, when using this
path set MICPZIUNPPGA=0):
000=Path disabled (disconnected)
001=-12dB gain through boost stage
010=-9dB gain through boost stage
111=+6dB gain through boost stage
Input BOOST enable
0 = Boost stage OFF
1 = Boost stage ON
Controls the MIC2 amplifier to the
PD, Rev 4.5 ,September 2008
DESCRIPTION
DESCRIPTION
DESCRIPTION
DESCRIPTION
Production Data
18

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