WM8510GEDS/V Wolfson Microelectronics, WM8510GEDS/V Datasheet - Page 54

• Manufacturer Part Number: WM8510GEDS/V
• Description: Audio CODECs VoIP Mono CODEC
• Manufacturer: Wolfson Microelectronics

Specifications of WM8510GEDS/V

• Operating Supply Voltage: - 0.3 V to + 7 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: SSOP-28
• Minimum Operating Temperature: - 25 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

WM8510
MASTER CLOCK AND PHASE LOCKED LOOP (PLL)
Figure 31 PLL and Clock Select Circuit
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Table 45 Sample Rate Control
The WM8510 has an on-chip phase-locked loop (PLL) circuit that can be used to:
Generate master clocks for the WM8510 audio functions from another external clock, e.g. in
telecoms applications.
Generate and output (on pin CSB/GPIO) a clock for another part of the system that is derived from
an existing audio master clock.
Figure 31 shows the PLL and internal clocking arrangement on the WM8510.
The PLL can be enabled or disabled by the PLLEN register bit.
Note: In order to minimise current consumption, the PLL is disabled when the VMIDSEL[1:0] bits are
set to 00b. VMIDSEL[1:0] must be set to a value other than 00b to enable the PLL.
Table 46 PLLEN Control Bit
R7
Additional
control
R1
Power
management 1
REGISTER
ADDRESS
REGISTER
ADDRESS
3:1
BIT
5
BIT
SR
LABEL
PLLEN
LABEL
000
0
DEFAULT
DEFAULT
PLL enable
0=PLL off
1=PLL on
Approximate sample rate (configures the
coefficients for the internal digital filters):
000=48kHz
001=32kHz
010=24kHz
011=16kHz
100=12kHz
101=8kHz
110-111=reserved
DESCRIPTION
PD, Rev 4.5 ,September 2008
DESCRIPTION
Production Data
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