USB3290-FH-TR SMSC, USB3290-FH-TR Datasheet
USB3290-FH-TR
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USB3290-FH-TR Summary of contents
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... SMSC USB3290 USB3290 Small Footprint Hi-Speed USB 2.0 Device PHY with UTMI Interface Applications The USB3290 is the ideal companion to any ASIC, SoC or FPGA solution designed with a UTMI Hi-Speed USB device (peripheral) core. The USB3290 is well suited for: Cell Phones MP3 Players ...
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... USB3290-FH FOR 40 BALL, VFBGA LEAD-FREE ROHS COMPLIANT PACKAGE USB3290-FH-TR FOR 40 BALL, VFBGA LEAD-FREE ROHS COMPLIANT PACKAGE (TAPE AND REEL) 80 ARKAY DRIVE, HAUPPAUGE, NY 11788 (631) 435-6000, FAX (631) 273-3123 Copyright © 2007 SMSC or its subsidiaries. All rights reserved. Circuit diagrams and other information relating to SMSC products are included as a means of illustrating typical applications. Consequently, complete information sufficient for construction purposes is not necessarily given ...
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... HS Detection Handshake – FS Downstream Facing Port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 8.9 HS Detection Handshake – HS Downstream Facing Port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 8.10 HS Detection Handshake – Suspend Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 8.11 Assertion of Resume . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 8.12 Detection of Resume . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 8.13 HS Device Attach . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 8.14 Application Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 Chapter 9 Package Outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 SMSC USB3290 3 DATASHEET Revision 1.5 (11-02-07) ...
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... Figure 8.7 Resume Timing Behavior (HS Mode Figure 8.8 Device Attach Behavior . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 Figure 8.9 USB3290 Application Diagram showing USB related signals . . . . . . . . . . . . . . . . . . . . . . . . 41 Figure 8.10 USB3290 Application Diagram showing power and miscellaneous signals Figure 9.1 USB3290-FH 40 Ball, VFBGA Package Outline & Parameters 4x4x0.9mm Body, Lead-Free RoHS Compliant 43 Figure 9 ...
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... Table 8.5 Suspend Timing Values (HS Mode Table 8.6 HS Detection Handshake Timing Values (FS Mode Table 8.7 Reset Timing Values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Table 8.8 HS Detection Handshake Timing Values from Suspend . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 Table 8.9 Resume Timing Values (HS Mode Table 8.10 Attach and Reset Timing Values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 SMSC USB3290 (Note 6. (Note 6. (Note 6 ...
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... Chapter 1 General Description The USB3290 provides the Physical Layer (PHY) interface to a USB 2.0 Device Controller. The IC is available ball lead-free RoHS compliant VFBGA package. The small footprint package makes the USB3290 ideal for portable consumer electronics applications. 1.1 Product Description The USB3290 is an industrial temperature USB 2.0 physical layer transceiver (PHY) integrated circuit. SMSC’ ...
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... Encode RX LOGIC VP RX State VM Machine Serial to Clock Parallel Recovery Unit Conversion Clock Bit Unstuff and Data NRZI Recovery Decode Elasticity Buffer BIASING Bandgap Voltage Reference Current Reference Figure 2.1 USB3290 Block Diagram 7 DATASHEET System Clocking TX 1.5kΩ SE Revision 1.5 (11-02-07) ...
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... Small Footprint Hi-Speed USB 2.0 Device PHY with UTMI Interface REN XI XO V33 GND V33 V18A VIO TSEL TXV RST GND RXA OM0 LS1 V33 OM1 CLK LS0 TOP VIEW Figure 3.1 USB3290 Pinout - Top View 8 DATASHEET Datasheet 6 7 RXE RXV GND D0 V18 GND D6 VIO D7 SMSC USB3290 ...
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... OPMODE[1:0] Input (OM1) (OM0) LINESTATE[1:0] Output (LS1) (LS0) SMSC USB3290 Table 4.1 System Interface Signals ACTIVE LEVEL High Reset. Reset all state machines. After coming out of reset, must wait 5 rising edges of clock before asserting TXValid for transmit. See Section 7.8.3 N/A Transceiver Select ...
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... USB Positive Data Pin. N/A USB Negative Data Pin. ACTIVE LEVEL N/A External 1% bias resistor. Requires a 12kΩ resistor to ground. Used for setting HS transmit current level and on-chip termination impedance. N/A External crystal. 24MHz crystal connected from XI to XO. 10 DATASHEET Datasheet DESCRIPTION SMSC USB3290 ...
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... VDD1.8 N/A (V18) VSS N/A (GND) VDDA1.8 N/A (V18A) SMSC USB3290 Table 4.5 Power and Ground Signals ACTIVE LEVEL DESCRIPTION N/A 3.3V Supply. Provides power for USB 2.0 Transceiver, UTMI+ Digital, Digital I/O, and Regulators. High On-Chip 1.8V regulator enable. Connect to ground to disable both of the on chip (VDDA1 ...
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... XO driven by the external clock; and no connection DATASHEET Datasheet MIN TYP MAX UNITS -0.3 5.5 V -0.3 2.5 V -0.3 4.0 V -0.3 4 -55 150 C ± 150 mA MIN TYP MAX UNITS 3.0 3.3 3 DD3.3 0 DD3 MIN TYP MAX UNITS 24 MHz (±100ppm SMSC USB3290 ...
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... High-Level Output Voltage V OH Input Leakage Current I LI Pin Capacitance Cpin Note 6 3.0 to 3.6V; V DD3.3 SMSC USB3290 Note 6.1 CONDITIONS MIN Device Unconfigured FS idle not data transfer FS current during data transmit FS current during data receive HS idle not data transfer HS current during data ...
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... HSOL 14 DATASHEET Datasheet Note 6.3 ) MIN TYP MAX UNITS 0.2 V 0.8 2.5 V 0.8 V 2.0 V 0.050 0.150 V 0.3 V 2.8 3.6 V Ω 40.5 45 49.5 M Ω 10 0.900 1.24 1.575 kΩ 1.425 2.26 3.09 kΩ 3.0 3.6 V 100 mV -50 500 mV 100 mV 150 mV - SMSC USB3290 ...
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... Driver Waveform Requirements High Speed Mode Timing Receiver Waveform Requirements Data Source Jitter and Receiver Jitter Tolerance Note 6 3.0 to 3.6V; V DD3.3 SMSC USB3290 CONDITIONS 45 Ω load HSOH 45 Ω load OLHS HS termination resistor CHIRPJ disabled, pull-up resistor connected. 45 Ω load. HS termination resistor ...
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... Driver Characteristics of Full-Speed Drivers in High-Speed Capable Transceivers The USB3290 uses a differential output driver to drive the USB data signal onto the USB cable. Figure 6.1 Full-Speed Driver VOH/IOH Characteristics for High-speed Capable Transceiveron page 17 shows the V/I characteristics for a full-speed driver which is part of a high-speed capable transceiver. ...
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... Figure 6.1 Full-Speed Driver VOH/IOH Characteristics for High-speed Capable Transceiver Drive Low I out Slope = 1/40.5 Ohm (mA) Test Limit 10. Figure 6.2 Full-Speed Driver VOL/IOL Characteristics for High-speed Capable Transceiver SMSC USB3290 Slope = 1/49.5 Ohm Test Limit 0.566*V 0.698*V OH (Volts) Slope = 1/49.5 Ohm 1.09V 0.434 out 17 DATASHEET Slope = 1/40 ...
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... Figure 6.3 Eye Pattern Measurement Planes Revision 1.5 (11-02-07) Small Footprint Hi-Speed USB 2.0 Device PHY with UTMI Interface Figure 6.3). The Universal Serial Bus Specification Rev.2.0 defines the TP3 USB Cable Traces B Connector Device Circuit Board 18 DATASHEET Datasheet TP4 Transceiver SMSC USB3290 ...
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... UI following a transition, -475mV in all others Point 1 0V Point 2 0V Point 3 300mV Point 4 300mV Point 5 -300mV Point 6 -300mV SMSC USB3290 defines the transmit waveform requirements for a hub (measured at TP2 Point 3 Point 4 Point 2 Point 1 Point 5 Point 6 Unit Interval 100% N/A N/A 7.5% UI 92. ...
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... TP3 of Point 3 Point 4 Point 2 Point 1 Point 6 Point DATASHEET Datasheet 400mV Differential 0 Voltｓ Differential -400mV Differential 100% TIME (% OF UNIT INTERVAL) N/A N/A 15% UI 85% UI 35% UI 65% UI 35% UI 65% UI SMSC USB3290 ...
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... Small Footprint Hi-Speed USB 2.0 Device PHY with UTMI Interface Datasheet Chapter 7 Functional Overview Figure 2.1 on page 7 shows the functional block diagram of the USB3290. Each of the functions is described in detail below. 7.1 Modes of Operation The USB3290 supports an 8-bit bi-directional parallel interface. CLKOUT runs at 60MHz ...
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... rate, the data to the FS/HS TX block to be transmitted on the USB cable. Data transmit timing is shown in Figure 7.3 Transmit Timing for a Data Packet Revision 1.5 (11-02-07) Small Footprint Hi-Speed USB 2.0 Device PHY with UTMI Interface Figure 7.3. 22 DATASHEET Datasheet Figure 7.1 also shows SMSC USB3290 ...
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... After the SIE asserts TXVALID it can assume that the transmission has started when it detects TXREADY has been asserted. The SIE must assume that the USB3290 has consumed a data byte if TXREADY and TXVALID are asserted on the rising edge of CLKOUT. The SIE must have valid packet information (PID) asserted on the DATA bus coincident with the assertion of TXVALID ...
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... In the RX Wait state the receiver is always looking for SYNC. The USB3290 asserts RXACTIVE when SYNC is detected (Strip SYNC state). The USB3290 negates RXACTIVE when an EOP is detected and the elasticity buffer is empty (Strip EOP state). When RXACTIVE is asserted, RXVALID will be asserted if the RX Holding Register is full. ...
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... RX Logic block. The FS mode section of the FS/HS RX block also consists of a single-ended receiver on each of the data lines to determine the correct FS LINESTATE. For HS mode support, the FS/HS RX block contains a squelch circuit to insure that noise is never interpreted as data. SMSC USB3290 25 DATASHEET Revision 1.5 (11-02-07) ...
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... Termination Resistors The USB3290 transceiver fully integrates all of the USB termination resistors. The USB3290 includes the 1.5kΩ pull-up resistor on DP. In addition the 45Ω high speed termination resistors are also integrated. These integrated resistors require no tuning or trimming. The state of the resistors is determined by the operating mode of the PHY ...
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... Reset Pin The UTMI+ Digital can be reset at any time with the RESET pin. The RESET pin of the USB3290 may be asynchronously asserted and de-asserted so long held in the asserted state continuously for a duration greater than one CLKOUT cycle. The RESET input may be asserted when the USB3290 CLKOUT signal is not active (i ...
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... There is not a concept of variable single-ended thresholds in the USB 2.0 specification for HS mode. The HS receiver is used to detect Chirp where the output of the HS receiver is always qualified with the Squelch signal. If squelched, the output of the HS receiver is ignored. In the USB3290 alternative to using variable thresholds for the single-ended receivers, the following approach is used. ...
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... The only exception to this is when OPMODE[1:0] is set to state 2 while TXVALID has been asserted (the transceiver is transmitting a packet), in order to flag a transmission error. In this case, the USB3290 has already transmitted the SYNC pattern so upon negation of TXVALID the EOP must also be transmitted to properly terminate the packet. Changing the OPMODE[1:0] signals under all other conditions, while the transceiver is transmitting or receiving data will generate undefined results ...
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... Reset state. The device now enters the HS Detection Handshake protocol. Revision 1.5 (11-02-07) Small Footprint Hi-Speed USB 2.0 Device PHY with UTMI Interface DESCRIPTION 0 (reference) HS Reset 0ms < T1 < HS Reset T0 + 3.125ms T1 + 100µs < T2 < 875µs 30 DATASHEET Datasheet VALUE SMSC USB3290 ...
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... The earliest time where a device can issue Resume signaling. T4 The latest time that a device must actually be suspended, drawing no more than the suspend current from the bus. SMSC USB3290 DESCRIPTION 0 (reference) HS Reset 0ms < T1 < HS Reset T0 + 3.125ms T1 + 100 µs < T2 < 875µs ...
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... This transceiver design pushes as much of the responsibility for timing events on to the SIE as possible, and the SIE requires a stable CLKOUT signal to perform accurate timing. In case 2 and 3 above, CLKOUT has been running and is stable, however in case 1 the USB3290 is reset from a suspend state, and the internal oscillator and clocks of the transceiver are assumed to be powered down ...
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... T5 Earliest time at which host port may end reset Notes: T0 may occur to 4ms after HS Reset T0. The SIE must assert the Chirp K for 66000 CLKOUT cycles to ensure a 1ms minimum duration. SMSC USB3290 DESCRIPTION 0 (reference) T0 < T1 < HS Reset T0 + 6.0ms T1 + 1.0 ms < T2 < HS Reset T0 + 7.0ms T2 < ...
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... Small Footprint Hi-Speed USB 2.0 Device PHY with UTMI Interface !K K State Detect K? INC Chirp Count Chirp Count != 6 & !SE0 !J J State Detect J? INC Chirp Count Chirp Count != 6 & !SE0 34 DATASHEET Datasheet Chirp Invalid SE0 Chirp Count Chirp Valid SMSC USB3290 ...
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... T9 The earliest time at which host port may end reset. The latest time, at which the device may remove the DP pull-up and assert the HS terminations, reverts to HS default state. SMSC USB3290 Table 8.7 Reset Timing Values DESCRIPTION 0 (reference) T0 < T1 < HS Reset T0 + 6.0ms T0 + 1.0ms < T2 < ...
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... Detection Handshake – HS Downstream Facing Port" Handshake. Revision 1.5 (11-02-07) Small Footprint Hi-Speed USB 2.0 Device PHY with UTMI Interface Figure 8.6 shows how CLKOUT is used to control the duration of the for completion of the High Speed 36 DATASHEET Datasheet Section 8.9, SMSC USB3290 ...
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... Device asserts Chirp K on the bus. T3 Device removes Chirp K from the bus minimum width) and begins looking for host chirps. T4 CLK "Nominal" (CLKOUT is frequency accurate to ±500 ppm, duty cycle accurate to 50±5). SMSC USB3290 T1 T2 SE0 CLK power up time Device Chirp K DESCRIPTION ...
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... HS mode, must restore HS mode after bus activity stops. Revision 1.5 (11-02-07) Small Footprint Hi-Speed USB 2.0 Device PHY with UTMI Interface DESCRIPTION 0 (reference) T0 < T1 < 10ms 1.0ms < T2 < 15ms T1 + 20ms T3 + 1.33µs {2 Low-speed bit times} 38 DATASHEET Datasheet VALUE SMSC USB3290 ...
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... HS Device Attach Figure 8.8 demonstrates the timing of the USB3290 control signals during a device attach event. When a HS device is attached to an upstream port, power is asserted to the device and the device sets XCVRSELECT and TERMSELECT to FS mode (time T1 the +5V power available on the USB cable. Device Reset in BUS within normal operational range as defined in the USB 2 ...
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... T2 Debounce interval. The device now enters the HS Detection Handshake protocol. (HS Reset T0) Revision 1.5 (11-02-07) Small Footprint Hi-Speed USB 2.0 Device PHY with UTMI Interface Figure 8.8 Device Attach Behavior DESCRIPTION 40 DATASHEET Datasheet VALUE 0 (reference 100ms < 100ms < T2 SMSC USB3290 ...
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... Application Diagram Optional Level Shifter To V BUS detect input Figure 8.9 USB3290 Application Diagram showing USB related signals SMSC USB3290 USB3290 Opmode 1 Data0 Opmode 0 Data1 Xcvrselect 0 Data2 Termselect Data3 SuspendM Data4 Reset Data5 Data6 Txvalid Data7 Txready Rxvalid Rxactive Rxerror ...
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... Volt Supply Figure 8.10 USB3290 Application Diagram showing power and miscellaneous signals Revision 1.5 (11-02-07) Small Footprint Hi-Speed USB 2.0 Device PHY with UTMI Interface B3 VDD33 G1 VDD33 G2 VDD33 A5 VDD33 A2 REG_EN B5 VDDIO G6 VDDIO B4 VDDA18 USB3290 C6 VDD18 A1 RBIAS B2 GND B6 GND F2 GND F6 GND ...
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... Chapter 9 Package Outline Figure 9.1 USB3290-FH 40 Ball, VFBGA Package Outline & Parameters 4x4x0.9mm Body, Lead-Free RoHS Compliant ...
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... Figure 9.2 BGA, 4x4 Taping Dimensions and Part Orientation Revision 1.5 (11-02-07) Small Footprint Hi-Speed USB 2.0 Device PHY with UTMI Interface 44 DATASHEET Datasheet SMSC USB3290 ...
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... Small Footprint Hi-Speed USB 2.0 Device PHY with UTMI Interface Datasheet Figure 9.3 Reel Dimensions for 12mm Carrier Tape SMSC USB3290 45 DATASHEET Revision 1.5 (11-02-07) ...
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... Figure 9.4 Tape Length and Part Quantity Note: Standard reel size is 4000 pieces per reel. Revision 1.5 (11-02-07) Small Footprint Hi-Speed USB 2.0 Device PHY with UTMI Interface 46 DATASHEET Datasheet SMSC USB3290 ...