EP5362QI Enpirion, EP5362QI Datasheet
EP5362QI
Specifications of EP5362QI
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EP5362QI Summary of contents
Page 1
... Pin VID Output Voltage select External divider option Dynamically adjustable output Designed for Low noise/EMI Short circuit, UVLO, and thermal protection *Optimized PCB Layout file downloadable from the Enpirion Website to assure first pass design success 03132 EP5352Q/EP5362Q/EP5382Q 500/600/800mA Synchronous Buck Regulators V ...
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... Operating Junction Temperature Thermal Characteristics PARAMETER Thermal Resistance: Junction to Ambient (0 LFM) Thermal Resistance: Junction to Case (0 LFM) Thermal Shutdown Thermal Shutdown Hysteresis Electrical Characteristics NOTE 25° C unless otherwise noted. Typical values are at VIN = 3.6V. A EP5352QI, EP5362QI 2 EP5382QI 4 =10uF. IN OUT PARAMETER SYMBOL Operating Input Voltage ...
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... PARAMETER SYMBOL Dynamic Voltage Slew Rate V slew Continuous Output Current I OUT EP5352QI Continuous Output Current I OUT EP5362QI Continuous Output Current I OUT EP5382QI Shut-Down Current I SD Quiescent Current PFET OCP Threshold I LIM VS0-VS1 Voltage Threshold VS0-VS2 Pin Input Current I VSX Enable Voltage Threshold ...
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... One or more of these pins may be connected internally. V (Pin 15): Sense pin for output voltage SENSE regulation. Connect V SENSE voltage rail as close to the terminal of the output filter capacitor as possible. Enpirion 2010 all rights reserved, E&OE 03132 SENSE ...
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... Functional Block Diagram UVLO Thermal Limit Current Limit ENABLE Soft Start (-) PWM Comp (+) Sawtooth Generator Figure 4. Functional block diagram. Enpirion 2010 all rights reserved, E&OE 03132 EP5382Q/EP5362Q/EP5352Q P-Drive Logic N-Drive Compensation Network (-) Switch Error Amp (+) DAC Voltage VREF Select VS0 VS1 VS2 ...
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... Output Ripple Output Ripple V V out out 10mV/Div 10mV/Div 3.6V = 3.6V 200ns/Div 200ns/Div . .3V OUT OUT Output Cap = 10 Output Cap = 10 F 0805 F 0805 Enpirion 2010 all rights reserved, E&OE 03132 100 100 3.3V = 3.3V OUT OUT 3. ...
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... Integrated Inductor and Enpirion has introduced the world’s first product family featuring integrated inductors. high The EP53x2Q family utilizes a low loss, planar construction inductor. The use of an internal ...
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... DAC, which in turn is connected to the non-inverting input of the error amplifier. This allows the use of a single feedback divider with constant loop gain and Enpirion 2010 all rights reserved, E&OE 03132 During initial power up an under voltage lockout circuit will hold-off the switching circuitry until the input voltage reaches a sufficient level to insure proper operation ...
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... Capacitance above the 10uF minimum should be added if the transient performance is not sufficient using the 10uF. Enpirion recommends a low ESR MLCC type capacitor be used. The output capacitor must use a X5R or X7R or equivalent dielectric formulation. dielectric formulations lose capacitance with ...
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... LMK212BJ225KG-T LAYOUT CONSIDERATIONS* *Optimized PCB Layout file downloadable from the Enpirion Website to assure first pass design success Recommendation 1: Input and output filter capacitors should be placed as close to the EP53x2QI package as possible to reduce EMI from input and output loop AC currents. This reduces the physical area of the Input and Output AC current loops ...
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... Figure 8 shows two example board layouts. Note the placement of the input and output capacitors. They are placed close to the device to minimize the physical area of the AC current loops. Note the placement of the vias per recommendation 3. Enpirion 2010 all rights reserved, E&OE 03132 of 1.2V (VS2=0, VS1=1, VS0=1). ...
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... Design Considerations for Lead-Frame Based Modules Exposed Metal on Bottom Of Package Enpirion has developed a break-through in package technology that utilizes the lead frame as part of the electrical circuit. The lead frame offers many advantages in thermal performance, in reduced electrical lead resistance, and in overall foot print. However, it does require some special considerations ...
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... This area should be clear of any traces, planes, or vias, on the top layer of the PCB. JEDEC minimum separation = 0.20 JEDEC minimum separation = 0.20 Figure 10. Exposed pad clearances; the Enpirion lead frame package complies with JEDEC requirements. Enpirion 2010 all rights reserved, E&OE 03132 ...
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... Figure 11. Recommended PCB Solder Mask Openings. Enpirion 2010 all rights reserved, E&OE 03132 EP5382Q/EP5362Q/EP5352Q 14 09/23/2010 www.enpirion.com Rev: F ...
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... Figure 12. Package mechanical dimensions. Enpirion 2010 all rights reserved, E&OE 03132 EP5382Q/EP5362Q/EP5352Q 15 09/23/2010 www.enpirion.com Rev: F ...
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... Enpirion reserves the right to make changes in circuit design and/or specifications at any time without notice. Information furnished by Enpirion is believed to be accurate and reliable. Enpirion assumes no responsibility for its use or for infringement of patents or other third party rights, which may result from its use. Enpirion products are not authorized for use in nuclear control systems, as critical components in life support systems or equipment used in hazardous environment without the express written authority from Enpirion. ...