LC4256V-75TN176C Lattice, LC4256V-75TN176C Datasheet - Page 20

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LC4256V-75TN176C

Manufacturer Part Number
LC4256V-75TN176C
Description
CPLD - Complex Programmable Logic Devices 400MHZ 256 Macrocell 3.3 V 7.5 tPD
Manufacturer
Lattice
Datasheet

Specifications of LC4256V-75TN176C

Memory Type
EEPROM
Number Of Macrocells
256
Number Of Product Terms Per Macro
80
Maximum Operating Frequency
322 MHz
Delay Time
3 ns
Number Of Programmable I/os
44
Operating Supply Voltage
3.3 V
Supply Current
12.5 mA
Maximum Operating Temperature
+ 90 C
Minimum Operating Temperature
0 C
Package / Case
TQFP-176
Mounting Style
SMD/SMT
Supply Voltage (max)
3.6 V
Supply Voltage (min)
3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Lattice Semiconductor
I/O DC Electrical Characteristics
LVTTL
LVCMOS 3.3
LVCMOS 2.5
LVCMOS 1.8
(4000V/B)
LVCMOS 1.8
(4000C/Z)
PCI 3.3 (4000V/B)
PCI 3.3 (4000C/Z)
1. The average DC current drawn by I/Os between adjacent bank GND connections, or between the last GND in an I/O bank and the end of
the I/O bank, as shown in the logic signals connection table, shall not exceed n*8mA. Where n is the number of I/Os between bank GND
connections or between the last GND in a bank and the end of a bank.
Standard
Min (V)
-0.3
-0.3
-0.3
-0.3
-0.3
-0.3
-0.3
0.3 * 3.3 * (V
V
0.35 * V
IL
Max (V)
Over Recommended Operating Conditions
0.80
0.80
0.70
0.63
1.08
CC
CC
/ 1.8) 0.5 * 3.3 * (V
0.65 * V
Min (V)
1.70
1.17
2.0
2.0
1.5
20
CC
CC
V
ispMACH 4000V/B/C/Z Family Data Sheet
IH
/ 1.8)
Max (V)
5.5
5.5
3.6
3.6
3.6
5.5
5.5
0.1 V
0.1 V
Max (V)
0.40
0.20
0.40
0.20
0.40
0.20
0.40
0.20
0.40
0.20
V
OL
CCO
CCO
V
V
V
V
V
V
V
V
V
V
0.9 V
0.9 V
CCO
CCO
CCO
CCO
CCO
CCO
CCO
CCO
CCO
CCO
Min (V)
V
OH
- 0.40
- 0.20
- 0.40
- 0.20
- 0.40
- 0.20
- 0.45
- 0.20
- 0.45
- 0.20
CCO
CCO
(mA)
I
0.1
0.1
0.1
0.1
0.1
1.5
1.5
OL
8.0
8.0
8.0
2.0
2.0
1
(mA)
I
-0.1
-0.1
-0.1
-0.1
-0.1
-0.5
-0.5
-4.0
-4.0
-4.0
-2.0
-2.0
OH
1

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