LCMXO256C-3TN100C Lattice, LCMXO256C-3TN100C Datasheet - Page 51

• Manufacturer Part Number: LCMXO256C-3TN100C
• Description: CPLD - Complex Programmable Logic Devices 256 LUTS 78 I/O
• Manufacturer: Lattice
• Series: MachXOr

Specifications of LCMXO256C-3TN100C

• Memory Type: SRAM
• Number Of Macrocells: 128
• Delay Time: 4.9 ns
• Number Of Programmable I/os: 78
• Operating Supply Voltage: 1.8 V, 2.5 V, 3.3 V
• Supply Current: 13 mA
• Maximum Operating Temperature: + 90 C
• Minimum Operating Temperature: 0 C
• Package / Case: TQFP-100
• Mounting Style: SMD/SMT
• Supply Voltage (max): 3.465 V
• Supply Voltage (min): 1.71 V
• Cpld Type: FLASH
• No. Of Macrocells: 256
• No. Of I/o's: 78
• Propagation Delay: 4.9ns
• Global Clock Setup Time: 1.8ns
• Frequency: 420MHz
• Supply Voltage Range: 1.71V To 3.465V
• Rohs Compliant: Yes
• Programmable Type: In System Programmable
• Delay Time Tpd(1) Max: 4.9ns
• Voltage Supply - Internal: 1.71 V ~ 3.465 V
• Number Of Logic Elements/blocks: -
• Number Of Gates: -
• Number Of I /o: 78
• Operating Temperature: 0°C ~ 85°C
• Mounting Type: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Lattice Semiconductor
LCMXO256 and LCMXO640 Logic Signal Connections: 100 TQFP (Cont.)
* NC for “E” devices.
** Primary clock inputs are single-ended.
Pin Number
100
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
Function
VCCAUX
GNDIO0
VCCIO0
PT4B
PT4A
PT3D
PT3C
PT3B
PT3A
PT2E
PT2D
PT2C
PT2B
PT2A
PT2F
VCC
Ball
Bank
0
0
0
0
0
0
0
0
0
0
0
0
0
0
-
-
LCMXO256
PCLK0_1**
PCLK0_0**
Function
Dual
Differential
4-7
C
C
C
C
C
C
T
T
T
T
T
T
Function
VCCAUX
GNDIO0
VCCIO0
PT6B
PT5B
PT5A
PT3B
PT3A
PT2E
PT2B
PT2C
PT2A
PT4F
PT3F
PT2F
VCC
Ball
MachXO Family Data Sheet
Bank
0
0
0
0
0
0
0
0
0
0
0
0
0
0
-
-
LCMXO640
Pinout Information
PCLK0_1**
PCLK0_0**
Function
Dual
Differential
C
C
C
C
T
T
T
T