LC4256V-75TN144C Lattice, LC4256V-75TN144C Datasheet - Page 41

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LC4256V-75TN144C

Manufacturer Part Number
LC4256V-75TN144C
Description
CPLD - Complex Programmable Logic Devices 400MHZ 256 Macrocell 3.3 V 7.5 tPD
Manufacturer
Lattice
Datasheet

Specifications of LC4256V-75TN144C

Memory Type
EEPROM
Number Of Macrocells
256
Number Of Product Terms Per Macro
80
Maximum Operating Frequency
322 MHz
Delay Time
3 ns
Number Of Programmable I/os
48
Operating Supply Voltage
3.3 V
Supply Current
12.5 mA
Maximum Operating Temperature
+ 90 C
Minimum Operating Temperature
0 C
Package / Case
TQFP-144
Mounting Style
SMD/SMT
Supply Voltage (max)
3.6 V
Supply Voltage (min)
3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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0
Lattice Semiconductor
Switching Test Conditions
Figure 12 shows the output test load that is used for AC testing. The specific values for resistance, capacitance,
voltage, and other test conditions are shown in Table 11.
Figure 12. Output Test Load, LVTTL and LVCMOS Standards
Table 11. Test Fixture Required Components
LVCMOS I/O, (L -> H, H -> L)
LVCMOS I/O (Z -> H)
LVCMOS I/O (Z -> L)
LVCMOS I/O (H -> Z)
LVCMOS I/O (L -> Z)
1. C
L
includes test fixtures and probe capacitance.
Test Condition
DUT
106Ω 106Ω
106Ω
106Ω
R
1
106Ω
106Ω
R
2
V
R 1
R 2
41
CCO
35pF
35pF
35pF
5pF
5pF
C
L
ispMACH 4000V/B/C/Z Family Data Sheet
1
C L
LVCMOS 3.3 = 1.5V
LVCMOS 2.5 = V
LVCMOS 1.8 = V
1.5V
1.5V
V
V
OH
OL
+ 0.3
- 0.3
0213A/ispm4k
Timing Ref.
Point
Test
CCO
CCO
/2
/2
LVCMOS 3.3 = 3.0V
LVCMOS 2.5 = 2.3V
LVCMOS 1.8 = 1.65V
3.0V
3.0V
3.0V
3.0V
V
CCO

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