LC4256V-75TN144C Lattice, LC4256V-75TN144C Datasheet - Page 58

• Manufacturer Part Number: LC4256V-75TN144C
• Description: CPLD - Complex Programmable Logic Devices 400MHZ 256 Macrocell 3.3 V 7.5 tPD
• Manufacturer: Lattice

Specifications of LC4256V-75TN144C

• Memory Type: EEPROM
• Number Of Macrocells: 256
• Number Of Product Terms Per Macro: 80
• Maximum Operating Frequency: 322 MHz
• Delay Time: 3 ns
• Number Of Programmable I/os: 48
• Operating Supply Voltage: 3.3 V
• Supply Current: 12.5 mA
• Maximum Operating Temperature: + 90 C
• Minimum Operating Temperature: 0 C
• Package / Case: TQFP-144
• Mounting Style: SMD/SMT
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Lattice Semiconductor
ispMACH 4128V and 4256V Logic Signal Connections: 144-Pin TQFP
Pin Number
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
1
2
3
4
5
6
7
8
9
Bank Number
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
-
-
-
-
-
-
VCCO (Bank 0)
VCCO (Bank 0)
VCCO (Bank 0)
GND (Bank 0)
GND (Bank 0)
GND (Bank 0)
GLB/MC/Pad
GND
VCC
GND
TCK
B10
B12
B13
B14
NC
NC
C14
C13
C12
C10
NC
D14
D13
D12
D10
TDI
B0
B1
B2
B4
B5
B6
B8
B9
C9
C8
C6
C5
C4
C2
C1
C0
2
2
2
ispMACH 4128V
1
58
ispMACH 4000V/B/C/Z Family Data Sheet
B^10
B^11
C^11
C^10
D^11
D^10
ORP
C^9
C^8
C^7
C^6
C^5
C^4
C^3
C^2
C^1
C^0
D^9
D^8
B^0
B^1
B^2
B^3
B^4
B^5
B^6
B^7
B^8
B^9
-
-
-
-
-
-
-
-
-
-
-
-
-
-
VCCO (Bank 0)
VCCO (Bank 0)
VCCO (Bank 0)
GND (Bank 0)
GND (Bank 0)
GLB/MC/Pad
GND
GND
VCC
TCK
C12
C10
D14
D12
D10
G12
G10
NC
E10
E12
F10
F12
TDI
G8
G6
C8
C6
C4
C2
D8
D6
D4
E2
E4
E6
E8
F2
F4
F6
F8
I
I
I
2
2
2
1
ispMACH 4256V
ORP
G^4
G^3
C^6
C^5
C^4
C^3
C^2
C^1
D^7
D^6
D^5
D^4
D^3
D^2
E^1
E^2
E^3
E^4
E^5
E^6
G^6
G^5
F^1
F^2
F^3
F^4
F^5
F^6
-
-
-
-
-
-
-
-
-
-
-
-
-
-