A3PN030-ZVQG100 Actel, A3PN030-ZVQG100 Datasheet - Page 54

FPGA - Field Programmable Gate Array 30K System Gates ProASIC3 nano

A3PN030-ZVQG100

Manufacturer Part Number
A3PN030-ZVQG100
Description
FPGA - Field Programmable Gate Array 30K System Gates ProASIC3 nano
Manufacturer
Actel
Datasheet

Specifications of A3PN030-ZVQG100

Processor Series
A3PN030
Core
IP Core
Number Of Macrocells
256
Maximum Operating Frequency
350 MHz
Number Of Programmable I/os
77
Supply Voltage (max)
3.3 V
Supply Current
2 mA
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
- 20 C
Development Tools By Supplier
AGLN-Nano-Kit, AGLN-Z-Nano-Kit, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA, FloasPro 4, FlashPro 3, FlashPro Lite
Mounting Style
SMD/SMT
Supply Voltage (min)
1.5 V
Number Of Gates
30 K
Package / Case
VQFP-100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
A3PN030-ZVQG100
Manufacturer:
ACTEL
Quantity:
1 213
Part Number:
A3PN030-ZVQG100
Manufacturer:
Microsemi SoC
Quantity:
10 000
Part Number:
A3PN030-ZVQG100I
Manufacturer:
NXP
Quantity:
4 600
Part Number:
A3PN030-ZVQG100I
Manufacturer:
Microsemi SoC
Quantity:
10 000
ProASIC3 nano DC and Switching Characteristics
Figure 2-11 • Timing Model of the Registered I/O Buffers with Synchronous Enable and Asynchronous Clear
2- 40
Enable
Data
CLK
CLR
Fully Registered I/O Buffers with Synchronous Enable and
Asynchronous Clear
CC
Data Input I/O Register with
BB
AA
DD
Active High Enable
Active High Clear
Positive-Edge Triggered
D
E
DFN1E1C1
CLR
Q
EE
INBUF
Y
R e visio n 8
Array
Core
INBUF
CLKBUF
Data_out
LL
HH
JJ
KK
GG
FF
Data Output Register and
Enable Output Register with
D
E
D
E
DFN1E1C1
DFN1E1C1
Active High Enable
Active High Clear
Positive-Edge Triggered
CLR
CLR
Q
Q
DOUT
EOUT

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