LFXP2-8E-5FTN256I | |
|---|---|
| Manufacturer Part Number | LFXP2-8E-5FTN256I |
| Description | FPGA - Field Programmable Gate Array 8K LUTs 201 I/O Inst on DSP 1.2V -5 Spd |
| Manufacturer | Lattice |
| LFXP2-8E-5FTN256I datasheets |
|
Availability: By request
International delivery:
Warranty: 60 days
×
- We provide standard 60-days warranty for all parts. If warranty differs we always mention it beforehand. In case of return we cover shipping costs.
- If you still have any questions - please contact us
×
Shipping terms
- Standard delivery time differs from 5-8 business days if the supplier is a local one to 12-14 days if the suplier is from overseas. If delivery time differs it's always mentioned in our quotation.
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Payment terms
- For new client payment term is payment in advance. At this moment we accept 3 payment methods: wire transfer, PayPal and Western Union. Credit card payment is under constrution and will be introduced soon. Escrow service is acceptable. Net terms for regular customers is not a problem. Working with us is totally safe for you.
- If you still have any questions - please contact us
Specifications of LFXP2-8E-5FTN256I | |||
|---|---|---|---|
| Number Of Macrocells | 8000 | Number Of Programmable I/os | 201 |
| Data Ram Size | 226304 | Supply Voltage (max) | 1.26 V |
| Maximum Operating Temperature | + 100 C | Minimum Operating Temperature | - 40 C |
| Mounting Style | SMD/SMT | Supply Voltage (min) | 1.14 V |
| Package / Case | FTBGA-256 | Number Of Logic Elements/cells | * |
| Number Of Labs/clbs | * | Total Ram Bits | 226304 |
| Number Of I /o | 201 | Number Of Gates | - |
| Voltage - Supply | 1.14 V ~ 1.26 V | Mounting Type | * |
| Operating Temperature | -40°C ~ 100°C | Package | 256FTBGA |
| Family Name | LatticeXP2 | Device Logic Units | 8000 |
| Typical Operating Supply Voltage | 1.2 V | Maximum Number Of User I/os | 201 |
| Ram Bits | 226304 | Re-programmability Support | Yes |
| Lead Free Status / RoHS Status | Lead free / RoHS Compliant | ||
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PrevNext
Lattice Semiconductor
Checklist
LatticeXP2 Hardware Checklist Item
1
Power Supply
1.1
Core Supply VCC @1.2V
1.2
Auxiliary Supply V
1.3
PLL Supply V
CCPLL
1.4
JTAG Supply V
1.5
I/O Supply V
CCIO0-7
1.6
Supply Sequencing considerations
1.7
Supply Ramp considerations
1.8
Power Estimation
2
Configuration
2.1
Consistency of V
2.2
Configuration control and status selections
2.2.1
Pull-up or Pull-down on CFG0
2.2.2
Pull-up or Pull-down on CFG1
2.2.3
Pull-up on PROGRAMN
2.2.4
Pull-down on TCK
2.3
JTAG Supply and default logic levels
3
I/O Pin Assignment
3.1
I/O pin assignments around V
3.2
DDR Memory pin assignment considerations
3.3
True-LVDS pin assignment considerations
3.4
HSTL and SSTL pin assignment considerations
3.5
PCI clamp requirement considerations
1. Only necessary when CFG=0.
Technical Support Assistance
Hotline: 1-800-LATTICE (North America)
+1-503-268-8001 (Outside North America)
e-mail:
techsupport@latticesemi.com
Internet: www.latticesemi.com
Revision History
Date
June 2007
March 2011
@ 3.3V
CCAUX
@ 3.3V
from 1.2V to 3.3V
CCJ
from 1.2V to 3.3V
Supply if external SPI Flash is used
CCIO7
1
1
1
1
, INITN
, DONE
, TOE
CCPLL
Version
01.0
Initial release.
01.1
Added note to “I/O Pin Assignments Around V
18-5
LatticeXP2 Hardware Checklist
OK
N/A
Change Summary
” text section.
CCPLL
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